| 10515837 |
Method of wafer bonding of dissimilar thickness die |
Sean P. Kilcoyne |
2019-12-24 |
| 10504777 |
Method of manufacturing wafer level low melting temperature interconnections |
Sean P. Kilcoyne, George Grama |
2019-12-10 |
| 10446452 |
Method and structure for enabling controlled spacer RIE |
Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre +1 more |
2019-10-15 |
| 10438972 |
Sub-fin removal for SOI like isolation with uniform active fin height |
Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, John R. Sporre +1 more |
2019-10-08 |
| 10424663 |
Super long channel device within VFET architecture |
Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, John R. Sporre +1 more |
2019-09-24 |
| 10396181 |
Forming stacked nanowire semiconductor device |
Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre +1 more |
2019-08-27 |
| 10381437 |
Semiconductor device and method of forming the semiconductor device |
Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Robert R. Robison, John R. Sporre +1 more |
2019-08-13 |
| 10361129 |
Self-aligned double patterning formed fincut |
Stuart A. Sieg, Yann Mignot, Christopher J. Waskiewicz, Hemanth Jagannathan, Indira Seshadri |
2019-07-23 |
| 10355109 |
Spacer formation on semiconductor device |
Thamarai S. Devarajan, Sanjay C. Mehta, Soon-Cheon Seo |
2019-07-16 |
| 10304689 |
Margin for fin cut using self-aligned triple patterning |
Gauri Karve, Fee Li Lie, Stuart A. Sieg, John R. Sporre, Sean Teehan |
2019-05-28 |
| 10269931 |
Vertical transport field effect transistor with precise gate length definition |
Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, John R. Sporre, Sean Teehan |
2019-04-23 |
| 10256326 |
Forming stacked nanowire semiconductor device |
Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre +1 more |
2019-04-09 |
| 10256239 |
Spacer formation preventing gate bending |
Balasubramanian Pranatharthiharan, Soon-Cheon Seo, John R. Sporre |
2019-04-09 |
| 10249738 |
Nanosheet channel-to-source and drain isolation |
Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, John R. Sporre, Sean Teehan |
2019-04-02 |
| 10249762 |
Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors |
Marc A. Bergendahl, Kangguo Cheng, John R. Sporre, Sean Teehan |
2019-04-02 |
| 10243079 |
Utilizing multilayer gate spacer to reduce erosion of semiconductor fin during spacer patterning |
Andrew M. Greene, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Pietro Montanini |
2019-03-26 |
| 10199503 |
Under-channel gate transistors |
Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, John R. Sporre +1 more |
2019-02-05 |
| 10167558 |
Phase shifted gas delivery for high throughput and cost effectiveness associated with atomic layer etching and atomic layer deposition |
Fee Li Lie, Siva Kanakasabapathy, Hyung Joo Shin |
2019-01-01 |
