Issued Patents 2019
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10453736 | Dielectric isolation in gate-all-around devices | Robin Hsin Kuo Chao, Kangguo Cheng, Nicolas Loubet, Ruilong Xie | 2019-10-22 |
| 10431663 | Method of forming integrated circuit with gate-all-around field effect transistor and the resulting structure | Ruilong Xie, Balasubramanian Pranatharthiharan, Julien Frougier | 2019-10-01 |
| 10388760 | Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism | Julien Frougier, Ruilong Xie, Steven R. Bentley, Kangguo Cheng, Nicolas Loubet | 2019-08-20 |
| 10366931 | Nanosheet devices with CMOS epitaxy and method of forming | Ruilong Xie, Cheng Chi, Tenko Yamashita, Nicolas Loubet | 2019-07-30 |
| 10347749 | Reducing bending in parallel structures in semiconductor fabrication | Balasubramanian Pranatharthiharan, John R. Sporre, Ruilong Xie | 2019-07-09 |
| 10243079 | Utilizing multilayer gate spacer to reduce erosion of semiconductor fin during spacer patterning | Andrew M. Greene, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Eric R. Miller | 2019-03-26 |