Issued Patents 2019
Showing 1–25 of 354 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522661 | Integrated strained stacked nanosheet FET | Ramachandra Divakaruni, Juntao Li, Xin Miao | 2019-12-31 |
| 10522649 | Inverse T-shaped contact structures having air gap spacers | Choonghyun Lee, Juntao Li, Heng Wu, Peng Xu | 2019-12-31 |
| 10522594 | Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element | Peng Xu, Juntao Li, Choonghyun Lee | 2019-12-31 |
| 10522636 | Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor | Chun Wing Yeung, Chen Zhang, Peng Xu, Huiming Bu | 2019-12-31 |
| 10522658 | Vertical field effect transistor having improved uniformity | Juntao Li, Ruilong Xie, Chanro Park | 2019-12-31 |
| 10522678 | Vertical transistor pass gate device | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-12-31 |
| 10516064 | Multiple width nanosheet devices | Lawrence A. Clevenger, Carl Radens, Junli Wang, John H. Zhang | 2019-12-24 |
| 10516028 | Transistor with asymmetric spacers | Zhenxing Bi, Heng Wu, Peng Xu | 2019-12-24 |
| 10510885 | Transistor with asymmetric source/drain overlap | Peng Xu, Heng Wu, Zhenxing Bi | 2019-12-17 |
| 10510892 | Forming a sacrificial liner for dual channel devices | Huiming Bu, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu | 2019-12-17 |
| 10504794 | Self-aligned silicide/germanide formation to reduce external resistance in a vertical field-effect transistor | Choonghyun Lee, Juntao Li, Peng Xu | 2019-12-10 |
| 10505019 | Vertical field effect transistors with self aligned source/drain junctions | Xin Miao, Chen Zhang, Wenyu Xu | 2019-12-10 |
| 10504890 | High density nanosheet diodes | Juntao Li, Geng Wang, Qintao Zhang | 2019-12-10 |
| 10504786 | Semiconductor fins for FinFET devices and sidewall image transfer (SIT) processes for manufacturing the same | Veeraraghavan S. Basker, Theodorus E. Standaert | 2019-12-10 |
| 10505048 | Self-aligned source/drain contact for vertical field effect transistor | Wenyu Xu, Chen Zhang, Xin Miao | 2019-12-10 |
| 10504793 | Hybrid-channel nano-sheet FETs | Zhenxing Bi, Peng Xu, Wenyu Xu | 2019-12-10 |
| 10497799 | Dummy dielectric fins for finFETs with silicon and silicon germanium channels | Xin Miao, Wenyu Xu, Chen Zhang | 2019-12-03 |
| 10497629 | Self-aligned punch through stopper liner for bulk FinFET | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-12-03 |
| 10497796 | Vertical transistor with reduced gate length variation | Juntao Li, Choonghyun Lee, Peng Xu | 2019-12-03 |
| 10490447 | Airgap formation in BEOL interconnect structure using sidewall image transfer | Ekmini Anuja De Silva, Juntao Li, Yi Song, Peng Xu | 2019-11-26 |
| 10490453 | High threshold voltage FET with the same fin height as regular threshold voltage vertical FET | Xin Miao, Chen Zhang, Wenyu Xu | 2019-11-26 |
| 10490546 | Forming on-chip metal-insulator-semiconductor capacitor | Zhenxing Bi, Peng Xu, Chen Zhang | 2019-11-26 |
| 10483382 | Tunnel transistor | Peng Xu, Heng Wu, Zhenxing Bi | 2019-11-19 |
| 10483166 | Vertically stacked transistors | Tenko Yamahita, Chun Wing Yeung, Chen Zhang | 2019-11-19 |
| 10483375 | Fin cut etch process for vertical transistor devices | Wenyu Xu, Chen Zhang, Xin Miao | 2019-11-19 |