Issued Patents 2019
Showing 25 most recent of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504786 | Semiconductor fins for FinFET devices and sidewall image transfer (SIT) processes for manufacturing the same | Veeraraghavan S. Basker, Kangguo Cheng | 2019-12-10 |
| 10497629 | Self-aligned punch through stopper liner for bulk FinFET | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-12-03 |
| 10483091 | Selective ion filtering in a multipurpose chamber | Lawrence A. Clevenger, Roger A. Quon, Wei Wang, Chih-Chao Yang | 2019-11-19 |
| 10453934 | Vertical transport FET devices having air gap top spacer | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-10-22 |
| 10418280 | Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-09-17 |
| 10403740 | Gate planarity for FinFET using dummy polish stop | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-09-03 |
| 10396069 | Approach to fabrication of an on-chip resistor with a field effect transistor | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-08-27 |
| 10395977 | Self aligned via and pillar cut for at least a self aligned double pitch | Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo, Terry A. Spooner | 2019-08-27 |
| 10388576 | Semiconductor device including dual trench epitaxial dual-liner contacts | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-08-20 |
| 10388718 | Metal-insulator-metal capacitor structure | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-08-20 |
| 10381263 | Method of forming via contact with resistance control | Chih-Chao Yang | 2019-08-13 |
| 10373866 | Method of forming metal insulator metal capacitor with extended capacitor plates | Chih-Chao Yang | 2019-08-06 |
| 10373905 | Integrating metal-insulator-metal capacitors with air gap process flow | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-08-06 |
| 10361207 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung +1 more | 2019-07-23 |
| 10332796 | Fin pitch scaling for high voltage devices and low voltage devices on the same wafer | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-06-25 |
| 10325999 | Contact area to trench silicide resistance reduction by high-resistance interface removal | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-06-18 |
| 10319783 | Integrated magnetic tunnel junction (MTJ) in back end of line (BEOL) interconnects | Benjamin D. Briggs, Michael Rizzolo | 2019-06-11 |
| 10319640 | FinFET devices | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-06-11 |
| 10312318 | Metal-insulator-metal capacitor structure | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-06-04 |
| 10304941 | Replacement metal gate structures | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-05-28 |
| 10297448 | SiGe fins formed on a substrate | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-05-21 |
| 10297689 | Precise control of vertical transistor gate length | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-05-21 |
| 10290633 | CMOS compatible fuse or resistor using self-aligned contacts | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-05-14 |
| 10283586 | Capacitors | Veeraraghavan S. Basker, Kangguo Cheng, Christopher J. Penny, Junli Wang | 2019-05-07 |
| 10283406 | Fabrication of self-aligned gate contacts and source/drain contacts directly above gate electrodes and source/drains | Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang | 2019-05-07 |