CR

Carl Radens

IBM: 16 patents #220 of 11,143Top 2%
SS Stmicroelectronics Sa: 1 patents #41 of 130Top 35%
Overall (2019): #3,426 of 560,194Top 1%
16
Patents 2019

Issued Patents 2019

Patent #TitleCo-InventorsDate
10516064 Multiple width nanosheet devices Kangguo Cheng, Lawrence A. Clevenger, Junli Wang, John H. Zhang 2019-12-24
10438850 Semiconductor device with local connection Kangguo Cheng, Lawrence A. Clevenger, Junli Wang, John H. Zhang 2019-10-08
10431495 Semiconductor device with local connection Kangguo Cheng, Lawrence A. Clevenger, Junli Wang, John H. Zhang 2019-10-01
10411128 Strained fin channel devices Kangguo Cheng, Junli Wang, Lawrence A. Clevenger, John H. Zhang 2019-09-10
10395984 Self-aligned via interconnect structures Benjamin C. Backes, Brian Alexander Cohen, Joyeeta Nag 2019-08-27
10387235 Statistical design with importance sampling reuse Rajiv V. Joshi, Rouwaida N. Kanj, Sani R. Nassif 2019-08-20
10388639 Self-aligned three dimensional chip stack and method for making the same Lawrence A. Clevenger, Yiheng Xu, John H. Zhang 2019-08-20
10374046 Structure for reduced source and drain contact to gate stack capacitance Richard Q. Williams 2019-08-06
10347617 Self-aligned three dimensional chip stack and method for making the same Lawrence A. Clevenger, Yiheng Xu, John H. Zhang 2019-07-09
10325778 Utilizing multiple layers to increase spatial frequency Lawrence A. Clevenger, John H. Zhang 2019-06-18
10325777 Utilizing multiple layers to increase spatial frequency Lawrence A. Clevenger, John H. Zhang 2019-06-18
10319870 Photovoltaic module with a controllable infrared protection layer Lawrence A. Clevenger, Timothy J. Dalton, Maxime Darnon, Rainer Krause, Gerd Pfeiffer +2 more 2019-06-11
10319630 Encapsulated damascene interconnect structure for integrated circuits John H. Zhang, Lawrence A. Clevenger, Yiheng Xu 2019-06-11
10304815 Self-aligned three dimensional chip stack and method for making the same Lawrence A. Clevenger, Yiheng Xu, John H. Zhang 2019-05-28
10269905 Structure for reduced source and drain contact to gate stack capacitance Richard Q. Williams 2019-04-23
10242911 Forming self-aligned vias and air-gaps in semiconductor fabrication Lawrence A. Clevenger, John H. Zhang 2019-03-26