Issued Patents 2019
Showing 1–25 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522658 | Vertical field effect transistor having improved uniformity | Kangguo Cheng, Juntao Li, Ruilong Xie | 2019-12-31 |
| 10504798 | Gate cut in replacement metal gate process | Ruilong Xie, Laertis Economikos, Andrew M. Greene, Siva Kanakasabapathy, John R. Sporre | 2019-12-10 |
| 10497798 | Vertical field effect transistor with self-aligned contacts | Ruilong Xie, Steven Bentley, Puneet Harischandra Suvarna, Min Gyu Sung, Lars Liebmann +2 more | 2019-12-03 |
| 10468300 | Contacting source and drain of a transistor device | Ruilong Xie, Andre P. Labonte, Lars Liebmann, Daniel Chanemougame, Nigel G. Cave +1 more | 2019-11-05 |
| 10461196 | Control of length in gate region during processing of VFET structures | Steven Bentley, Ruilong Xie, Min Gyu Sung | 2019-10-29 |
| 10446399 | Hard mask layer to reduce loss of isolation material during dummy gate removal | Ruilong Xie, Min Gyu Sung, Hoon Kim | 2019-10-15 |
| 10446653 | Transistor-based semiconductor device with air-gap spacers and gate contact over active area | Ruilong Xie, Min Gyu Sung, Lars Liebmann, Hoon Kim | 2019-10-15 |
| 10418277 | Air gap spacer formation for nano-scale semiconductor devices | Kangguo Cheng, Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta +2 more | 2019-09-17 |
| 10410933 | Replacement metal gate patterning for nanosheet devices | Ruilong Xie, Min Gyu Sung, Hoon Kim, Hui Zang, Guowei Xu | 2019-09-10 |
| 10388770 | Gate and source/drain contact structures positioned above an active region of a transistor device | Ruilong Xie, Christopher M. Prindle | 2019-08-20 |
| 10388652 | Intergrated circuit structure including single diffusion break abutting end isolation region, and methods of forming same | Yongiun Shi, Lei Sun, Laertis Economikos, Ruilong Xie, Lars Liebmann +4 more | 2019-08-20 |
| 10373873 | Gate cut in replacement metal gate process | Ruilong Xie, Kangguo Cheng, Laertis Economikos | 2019-08-06 |
| 10373875 | Contacts formed with self-aligned cuts | Ruilong Xie, Daniel Jaeger, Laertis Economikos, Haiting Wang, Hui Zang | 2019-08-06 |
| 10366930 | Self-aligned gate cut isolation | Ruilong Xie, Min Gyu Sung, Kangguo Cheng, Guillaume Bouche | 2019-07-30 |
| 10319627 | Air-gap spacers for field-effect transistors | Min Gyu Sung, Hoon Kim, Ruilong Xie | 2019-06-11 |
| 10312154 | Method of forming vertical FinFET device having self-aligned contacts | Ruilong Xie, Steven Bentley, Puneet Harischandra Suvarna, Min Gyu Sung, Lars Liebmann +2 more | 2019-06-04 |
| 10297597 | Composite isolation structures for a fin-type field effect transistor | Min Gyu Sung, Ruilong Xie, Murat Kerem Akarvardar | 2019-05-21 |
| 10290544 | Methods of forming conductive contact structures to semiconductor devices and the resulting structures | Ruilong Xie, Lars Liebmann, Daniel Chanemougame | 2019-05-14 |
| 10283617 | Hybrid spacer integration for field-effect transistors | Ruilong Xie, Dong-Ick Lee, Min Gyu Sung | 2019-05-07 |
| 10283408 | Middle of the line (MOL) contacts with two-dimensional self-alignment | Ruilong Xie, Andre P. Labonte, Lars Liebmann | 2019-05-07 |
| 10269812 | Forming contacts for VFETs | Ruilong Xie, Lars Liebmann, Daniel Chanemougame, John H. Zhang, Steven Bentley +1 more | 2019-04-23 |
| 10249726 | Methods of forming a protection layer on a semiconductor device and the resulting device | Ruilong Xie, Xiuyu Cai | 2019-04-02 |
| 10243053 | Gate contact structure positioned above an active region of a transistor device | Ruilong Xie, Andre P. Labonte | 2019-03-26 |
| 10236291 | Methods, apparatus and system for STI recess control for highly scaled finFET devices | Min Gyu Sung, Hoon Kim, Ruilong Xie, Kwan-Yong Lim | 2019-03-19 |
| 10229855 | Methods of forming transistor devices with different threshold voltages and the resulting devices | Hoon Kim, Ruilong Xie, Min Gyu Sung | 2019-03-12 |