Issued Patents 2019
Showing 26–50 of 354 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10475923 | Method and structure for forming vertical transistors with various gate lengths | Shogo Mochizuki, Choonghyun Lee, Juntao Li | 2019-11-12 |
| 10468525 | VFET CMOS dual epitaxy integration | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2019-11-05 |
| 10468524 | Vertical field effect transistor with improved reliability | Xin Miao, Philip J. Oldiges, Wenyu Xu, Chen Zhang | 2019-11-05 |
| 10460944 | Fully depleted semiconductor on insulator transistor with enhanced back biasing tunability | Shawn P. Fetterolf, Terry Hook | 2019-10-29 |
| 10460982 | Formation of semiconductor devices with dual trench isolations | Juntao Li, Choonghyun Lee, Peng Xu | 2019-10-29 |
| 10461184 | Transistor having reduced gate-induced drain-leakage current | Choonghyun Lee | 2019-10-29 |
| 10454025 | Phase change memory with gradual resistance change | — | 2019-10-22 |
| 10453959 | Fin replacement in a field-effect transistor | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis | 2019-10-22 |
| 10453940 | Vertical field effect transistor with strained channel region extension | Shogo Mochizuki, Choonghyun Lee, Juntao Li | 2019-10-22 |
| 10453920 | Techniques for forming finFET transistors with same fin pitch and different source/drain epitaxy configurations | Peng Xu | 2019-10-22 |
| 10453843 | Multiple finFET Formation with epitaxy separation | Juntao Li, Peng Xu | 2019-10-22 |
| 10453934 | Vertical transport FET devices having air gap top spacer | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-10-22 |
| 10453939 | Reduced capacitance in vertical transistors by preventing excessive overlap between the gate and the source/drain | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2019-10-22 |
| 10453736 | Dielectric isolation in gate-all-around devices | Robin Hsin Kuo Chao, Nicolas Loubet, Pietro Montanini, Ruilong Xie | 2019-10-22 |
| 10446686 | Asymmetric dual gate fully depleted transistor | Terry Hook, Yi Song, Chen Zhang, Xin Miao, Peng Xu | 2019-10-15 |
| 10446647 | Approach to minimization of strain loss in strained fin field effect transistors | Zhenxing Bi, Juntao Li, Peng Xu | 2019-10-15 |
| 10446650 | FinFET with a silicon germanium alloy channel and method of fabrication thereof | Bruce B. Doris, Hong He, Ali Khakifirooz | 2019-10-15 |
| 10446664 | Inner spacer formation and contact resistance reduction in nanosheet transistors | Choonghyun Lee, Juntao Li, Peng Xu | 2019-10-15 |
| 10446452 | Method and structure for enabling controlled spacer RIE | Ryan O. Jung, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer, John R. Sporre +1 more | 2019-10-15 |
| 10438972 | Sub-fin removal for SOI like isolation with uniform active fin height | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Eric R. Miller, John R. Sporre +1 more | 2019-10-08 |
| 10439031 | Integration of vertical-transport transistors and electrical fuses | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2019-10-08 |
| 10439044 | Method and structure of fabricating I-shaped silicon germanium vertical field-effect transistors | Choonghyun Lee, Juntao Li, Peng Xu | 2019-10-08 |
| 10439136 | Nanoparticle with plural functionalities, and method of forming the nanoparticle | Qing Cao, Zhengwen Li, Fei Liu | 2019-10-08 |
| 10438850 | Semiconductor device with local connection | Lawrence A. Clevenger, Carl Radens, Junli Wang, John H. Zhang | 2019-10-08 |
| 10438855 | Dual channel FinFETs having uniform fin heights | Zhenxing Bi, Peng Xu, Jie Yang | 2019-10-08 |