Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10460944 | Fully depleted semiconductor on insulator transistor with enhanced back biasing tunability | Kangguo Cheng, Shawn P. Fetterolf | 2019-10-29 |
| 10446686 | Asymmetric dual gate fully depleted transistor | Kangguo Cheng, Yi Song, Chen Zhang, Xin Miao, Peng Xu | 2019-10-15 |
| 10325821 | Three-dimensional stacked vertical transport field effect transistor logic gate with buried power bus | Ardasheir Rahman, Joshua M. Rubin, Chen Zhang | 2019-06-18 |
| 10217674 | Three-dimensional monolithic vertical field effect transistor logic gates | Ardasheir Rahman, Joshua M. Rubin, Chen Zhang | 2019-02-26 |