Issued Patents 2019
Showing 76–100 of 354 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10403772 | Electrical and optical via connections on a same chip | Juntao Li, Chengwen Pei, Geng Wang, Joseph Ervin | 2019-09-03 |
| 10403716 | Trench contact resistance reduction | Zhenxing Bi, Juntao Li, Peng Xu | 2019-09-03 |
| 10396214 | Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistors | Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2019-08-27 |
| 10396208 | Vertical transistors with improved top source/drain junctions | Muthumanickam Sankarapandian, Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2019-08-27 |
| 10396172 | Transistor with air spacer and self-aligned contact | Xin Miao, Peng Xu, Chen Zhang | 2019-08-27 |
| 10396179 | Forming vertical transport field effect transistors with uniform bottom spacer thickness | Xuefeng Liu, Peng Xu, Yongan Xu | 2019-08-27 |
| 10396181 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer, John R. Sporre +1 more | 2019-08-27 |
| 10396169 | Nanosheet transistors having different gate dielectric thicknesses on the same chip | Juntao Li, Geng Wang, Qintao Zhang | 2019-08-27 |
| 10396075 | Very narrow aspect ratio trapping trench structure with smooth trench sidewalls | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10396069 | Approach to fabrication of an on-chip resistor with a field effect transistor | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-08-27 |
| 10396151 | Vertical field effect transistor with reduced gate to source/drain capacitance | Juntao Li, Choonghyun Lee, Peng Xu | 2019-08-27 |
| 10396198 | Vertical transistor pass gate device | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10395988 | Vertical FET transistor with reduced source/drain contact resistance | Zheng Xu, Ruqiang Bao, Zhenxing Bi | 2019-08-27 |
| 10395994 | Equal spacer formation on semiconductor device | Heng Wu, Juntao Li, Peng Xu, Choonghyun Lee | 2019-08-27 |
| 10395996 | Method for forming a semiconductor structure containing high mobility semiconductor channel materials | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2019-08-27 |
| 10396027 | Electrical fuse and/or resistor structures | Veeraraghavan S. Basker, Ali Khakifirooz, Juntao Li | 2019-08-27 |
| 10396202 | Method and structure for incorporating strain in nanosheet devices | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10396152 | Fabrication of perfectly symmetric gate-all-around FET on suspended nanowire using interface interaction | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2019-08-27 |
| 10388755 | Stacked nanosheets with self-aligned inner spacers and metallic source/drain | Choonghyun Lee, Juntao Li | 2019-08-20 |
| 10388729 | Devices and methods of forming self-aligned, uniform nano sheet spacers | John H. Zhang, Lawrence A. Clevenger, Balasubramanian S. Haran | 2019-08-20 |
| 10388760 | Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism | Julien Frougier, Ruilong Xie, Steven R. Bentley, Nicolas Loubet, Pietro Montanini | 2019-08-20 |
| 10388731 | Stacked nanowire device width adjustment by gas cluster ion beam (GCIB) | Xin Miao, Ruilong Xie, Tenko Yamashita | 2019-08-20 |
| 10388795 | Vertical transistor including controlled gate length and a self-aligned junction | Ramachandra Divakaruni | 2019-08-20 |
| 10388651 | Shallow trench isolation recess process flow for vertical field effect transistor fabrication | Zhenxing Bi, Bruce Miao, Xin Miao | 2019-08-20 |
| 10388732 | Nanosheet field-effect transistors including a two-dimensional semiconducting material | Julien Frougier, Ruilong Xie, Nicolas Loubet, Juntao Li | 2019-08-20 |