Issued Patents 2019
Showing 101–125 of 354 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10388760 | Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism | Julien Frougier, Ruilong Xie, Steven R. Bentley, Nicolas Loubet, Pietro Montanini | 2019-08-20 |
| 10388754 | Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling | Xiuyu Cai, Ali Khakifirooz, Ruilong Xie, Tenko Yamashita | 2019-08-20 |
| 10388572 | Integrating metal-insulator-metal capacitors with fabrication of vertical field effect transistors | Xuefeng Liu, Heng Wu, Peng Xu | 2019-08-20 |
| 10388576 | Semiconductor device including dual trench epitaxial dual-liner contacts | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-08-20 |
| 10388571 | Fin type field effect transistors with different pitches and substantially uniform fin reveal | Zhenxing Bi, Thamarai S. Devarajan, Balasubramanian Pranatharthiharan | 2019-08-20 |
| 10388795 | Vertical transistor including controlled gate length and a self-aligned junction | Ramachandra Divakaruni | 2019-08-20 |
| 10388577 | Nanosheet devices with different types of work function metals | Xin Miao, Wenyu Xu, Chen Zhang | 2019-08-20 |
| 10388651 | Shallow trench isolation recess process flow for vertical field effect transistor fabrication | Zhenxing Bi, Bruce Miao, Xin Miao | 2019-08-20 |
| 10388570 | Substrate with a fin region comprising a stepped height structure | Peng Xu | 2019-08-20 |
| 10381476 | Vertical transport fin field effect transistors on a substrate with varying effective gate lengths | Zhenxing Bi, Juntao Li, Peng Xu | 2019-08-13 |
| 10381273 | Vertically stacked multi-channel transistor structure | Tenko Yamashita, Chun-Chen Yeh, Ruilong Xie | 2019-08-13 |
| 10381355 | Dense vertical field effect transistor structure | Peng Xu, Zhenxing Bi, Juntao Li | 2019-08-13 |
| 10381468 | Method and structure for forming improved single electron transistor with gap tunnel barriers | Xin Miao, Wenyu Xu, Chen Zhang | 2019-08-13 |
| 10381262 | Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap | Zuoguang Liu, Sebastian Naczas, Heng Wu, Peng Xu | 2019-08-13 |
| 10381267 | Field effect device with reduced capacitance and resistance in source/drain contacts at reduced gate pitch | Chi-Chun Liu, Peng Xu | 2019-08-13 |
| 10374089 | Tensile strain in NFET channel | Peng Xu, Juntao Li, Heng Wu | 2019-08-06 |
| 10374091 | Silicon germanium fin immune to epitaxy defect | Juntao Li, Xin Miao | 2019-08-06 |
| 10374083 | Vertical fin field effect transistor with reduced gate length variations | Chen Zhang, Xin Miao, Wenyu Xu | 2019-08-06 |
| 10374064 | Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping | Ruilong Xie, Tenko Yamashita | 2019-08-06 |
| 10374073 | Single electron transistor with wrap-around gate | Xin Miao, Wenyu Xu, Chen Zhang | 2019-08-06 |
| 10373873 | Gate cut in replacement metal gate process | Chanro Park, Ruilong Xie, Laertis Economikos | 2019-08-06 |
| 10373905 | Integrating metal-insulator-metal capacitors with air gap process flow | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2019-08-06 |
| 10373908 | Dielectric thermal conductor for passivating eFuse and metal resistor | Qing Cao, Zhengwen Li, Fei Liu | 2019-08-06 |
| 10374035 | Bulk nanosheet with dielectric isolation | Bruce B. Doris, Junli Wang | 2019-08-06 |
| 10367077 | Wrap around contact using sacrificial mandrel | Nicolas Loubet, Adra Carr | 2019-07-30 |