Issued Patents 2019
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522678 | Vertical transistor pass gate device | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-12-31 |
| 10468503 | Stacked vertical transport field effect transistor electrically erasable programmable read only memory (EEPROM) devices | Jeng-Bang Yau, Alexander Reznicek, Tak H. Ning | 2019-11-05 |
| 10438956 | High density programmable e-fuse co-integrated with vertical FETs | Michael A. Guillorn, Pouya Hashemi, Alexander Reznicek | 2019-10-08 |
| 10424585 | Decoupling capacitor on strain relaxation buffer layer | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-09-24 |
| 10424650 | Single column compound semiconductor bipolar junction transistor fabricated on III-V compound semiconductor surface | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2019-09-24 |
| 10396198 | Vertical transistor pass gate device | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10396202 | Method and structure for incorporating strain in nanosheet devices | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10396075 | Very narrow aspect ratio trapping trench structure with smooth trench sidewalls | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-08-27 |
| 10388648 | Vertical field effect transistor (VFET) programmable complementary metal oxide semiconductor inverter | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2019-08-20 |
| 10381349 | Stacked complementary junction FETs for analog electronic circuits | Bahman Hekmatshoartabari, Alexander Reznicek, Jeng-Bang Yau | 2019-08-13 |
| 10366984 | Diode connected vertical transistor | Pouya Hashemi, Alexander Reznicek | 2019-07-30 |
| 10361301 | Fabrication of vertical fin transistor with multiple threshold voltages | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-07-23 |
| 10361199 | Vertical transistor transmission gate with adjacent NFET and PFET | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-07-23 |
| 10360526 | Analytics to determine customer satisfaction | Keith A. Jenkins, Barry P. Linder | 2019-07-23 |
| 10354960 | Support for long channel length nanowire transistors | Isaac Lauer, Tenko Yamashita, Jeffrey W. Sleight | 2019-07-16 |
| 10347539 | Germanium dual-fin field effect transistor | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-07-09 |
| 10332972 | Single column compound semiconductor bipolar junction transistor fabricated on III-V compound semiconductor surface | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2019-06-25 |
| 10312234 | Diode connected vertical transistor | Pouya Hashemi, Alexander Reznicek | 2019-06-04 |
| 10312337 | Fabrication of nano-sheet transistors with different threshold voltages | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-06-04 |
| 10312151 | Monolithic co-integration of MOSFET and JFET for neuromorphic/cognitive circuit applications | Bahman Hekmatshoartabari, Alexander Reznicek, Jeng-Bang Yau | 2019-06-04 |
| 10304823 | Vertical field effect transistor (VFET) programmable complementary metal oxide semiconductor inverter | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2019-05-28 |
| 10304844 | Stacked FinFET EEPROM | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2019-05-28 |
| 10297686 | Tapered vertical FET having III-V channel | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-05-21 |
| 10297512 | Method of making thin SRAM cell having vertical transistors | Michael A. Guillorn, Pouya Hashemi, Alexander Reznicek | 2019-05-21 |
| 10283601 | Strained silicon germanium fin with block source/drain epitaxy and improved overlay capacitance | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2019-05-07 |