SS

Stuart A. Sieg

IBM: 12 patents #348 of 11,143Top 4%
Overall (2019): #5,701 of 560,194Top 2%
12
Patents 2019

Issued Patents 2019

Patent #TitleCo-InventorsDate
10461172 Vertical transistors having improved gate length control using uniformly deposited spacers Christopher J. Waskiewicz, Hemanth Jagannathan, Yann Mignot 2019-10-29
10410875 Alternating hardmasks for tight-pitch line formation Sean D. Burns, Nelson Felix, Chi-Chun Liu, Yann Mignot 2019-09-10
10361129 Self-aligned double patterning formed fincut Yann Mignot, Christopher J. Waskiewicz, Hemanth Jagannathan, Eric R. Miller, Indira Seshadri 2019-07-23
10312103 Alternating hardmasks for tight-pitch line formation Sean D. Burns, Nelson Felix, Chi-Chun Liu, Yann Mignot 2019-06-04
10312346 Vertical transistor with variable gate length Brent A. Anderson, Bassem M. Hamieh, Junli Wang 2019-06-04
10304744 Inverse tone direct print EUV lithography enabled by selective material deposition Praveen Joseph, Ekmini Anuja De Silva, Fee Li Lie, Yann Mignot, Indira Seshadri 2019-05-28
10304689 Margin for fin cut using self-aligned triple patterning Gauri Karve, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan 2019-05-28
10249753 Gate cut on a vertical field effect transistor with a defined-width inorganic mask Brent A. Anderson, Sivananda K. Kanakasabapathy, Jeffrey C. Shearer, John R. Sporre, Junli Wang 2019-04-02
10242952 Registration mark formation during sidewall image transfer process David J. Conklin, Allen H. Gabor, Sivananda K. Kanakasabapathy, Byeong Y. Kim, Fee Li Lie 2019-03-26
10211321 Stress retention in fins of fin field-effect transistors Sivananda K. Kanakasabapathy, Gauri Karve, Juntao Li, Fee Li Lie, John R. Sporre 2019-02-19
10211319 Stress retention in fins of fin field-effect transistors Sivananda K. Kanakasabapathy, Gauri Karve, Juntao Li, Fee Li Lie, John R. Sporre 2019-02-19
10176997 Direct gate patterning for vertical transport field effect transistor Ekmini Anuja De Silva, Indira Seshadri, Wenyu Xu 2019-01-08