Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10475905 | Techniques for vertical FET gate length control | Chi-Chun Liu, Chun Wing Yeung, Robin Hsin Kuo Chao, Zhenxing Bi, Kristin Schmidt | 2019-11-12 |
| 10395985 | Self aligned conductive lines with relaxed overlay | Sean D. Burns, Lawrence A. Clevenger, Matthew E. Colburn, Sivananda K. Kanakasabapathy, Christopher J. Penny +2 more | 2019-08-27 |
| 10256289 | Efficient metal-insulator-metal capacitor fabrication | Kisup Chung, Isabel C. Estrada-Raygoza, Hemanth Jagannathan, Chi-Chun Liu, Hao Tang | 2019-04-09 |