Issued Patents All Time
Showing 26–50 of 694 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12368127 | Semiconductor chip package having underfill material surrounding a fan-out package and contacting a stress buffer structure sidewall | Po-Chen Lai, Ming-Chih Yew, Shu-Shen Yeh, Po-Yao Lin | 2025-07-22 |
| 12362341 | Semiconductor devices and methods of manufacturing | Chang-Yi Yang, Po-Yao Chuang | 2025-07-15 |
| 12362299 | Basin-shaped underbump plates and methods of forming the same | Yen-Hao Chen, Han-Hsiang Huang, Yu-Sheng Lin, Chien-Sheng Chen | 2025-07-15 |
| 12362276 | Semiconductor package having a semiconductor device bonded to a circuit substrate through a floated or grounded dummy conductor and method of manufacturing the same | Feng-Cheng Hsu | 2025-07-15 |
| 12362256 | Method for forming semiconductor package structure | Po-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang | 2025-07-15 |
| 12362197 | Semiconductor die package with ring structure | Yu-Sheng Lin, Shu-Shen Yeh, Chin-Hua Wang, Po-Yao Lin | 2025-07-15 |
| 12355001 | Semiconductor package structure and method for forming the same | Yen-Chu Tu, Shang-Lun Tsai, Monsen Liu, Shuo-Mao Chen | 2025-07-08 |
| 12354989 | Package structure with conductive via structure | Meng-Liang Lin, Po-Yao Chuang | 2025-07-08 |
| 12354940 | Redistribution layer structure with support features and methods | Monsen Liu, Shang-Lun Tsai, Shuo-Mao Chen | 2025-07-08 |
| 12354938 | Semiconductor package and methods of manufacturing | Hsien-Wei Chen, Meng-Liang Lin | 2025-07-08 |
| 12354928 | Semiconductor device and manufacturing method thereof | Shu-Shen Yeh, Po-Yao Lin, Hui Yu, Shyue-Ter Leu | 2025-07-08 |
| 12347793 | Semiconductor package | Chin-Hua Wang, Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin | 2025-07-01 |
| 12347764 | Organic interposer including intra-die structural reinforcement structures and methods of forming the same | Li-Ling Liao, Ming-Chih Yew, Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin | 2025-07-01 |
| 12347758 | Dual-underfill encapsulation for packaging and methods of forming the same | Jing-Ye Juang, Chia-Kuei Hsu, Ming-Chih Yew, Hsien-Wei Chen | 2025-07-01 |
| 12341091 | Semiconductor packages having conductive patterns of redistribution structure having ellipse-like shape | Chia-Kuei Hsu, Ming-Chih Yew, Po-Chen Lai, Chin-Hua Wang, Po-Yao Lin | 2025-06-24 |
| 12334451 | Semiconductor package including package substrate with dummy via and method of forming the same | Chin-Hua Wang, Po-Chen Lai, Chun-Wei Chen | 2025-06-17 |
| 12327772 | Semiconductor package including stress-reduction structures and methods of forming the same | Shu-Shen Yeh, Yu-Sheng Lin, Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang | 2025-06-10 |
| 12322742 | Semiconductor structure and manufacturing method thereof | Hsiang-Tai Lu, Shuo-Mao Chen, Mill-Jer Wang, Feng-Cheng Hsu, Chao-Hsiang Yang +4 more | 2025-06-03 |
| 12322704 | Package structure with underfill | Yu-Sheng Lin, Po-Yao Lin, Chin-Hua Wang, Shu-Shen Yeh, Che-Chia Yang | 2025-06-03 |
| 12322703 | Eccentric via structures for stress reduction | Shu-Shen Yeh, Che-Chia Yang, Chia-Kuei Hsu, Po-Yao Lin, Chia-Hsiang Lin | 2025-06-03 |
| 12322666 | Package assembly lid and methods for forming the same | Yu-Sheng Lin, Shu-Shen Yeh, Chien-Shen Chen, Po-Yao Lin, Ming-Chih Yew +3 more | 2025-06-03 |
| 12315768 | Package assembly including lid with additional stress mitigating feet and methods of making the same | Yu-Sheng Lin, Shu-Shen Yeh, Chin-Hua Wang, Po-Yao Lin, Chien-Hung Chen +3 more | 2025-05-27 |
| 12308346 | Semiconductor die with tapered sidewall in package | Chin-Hua Wang, Po-Yao Lin, Po-Chen Lai, Shu-Shen Yeh, Ming-Chih Yew +1 more | 2025-05-20 |
| 12308322 | Dual-sided routing in 3D semiconductor system-in-package structure and methods of forming the same | Po-Hao Tsai, Po-Yao Chuang, Meng-Liang Lin, Yi-Wen Wu, Techi Wong | 2025-05-20 |
| 12308321 | Structures to increase substrate routing density and methods of forming the same | Hsien-Wei Chen, Meng-Liang Lin | 2025-05-20 |