Issued Patents All Time
Showing 51–75 of 110 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11749644 | Semiconductor device with curved conductive lines and method of forming the same | Chia-Kuei Hsu, Shu-Shen Yeh, Che-Chia Yang, Po-Yao Lin, Shin-Puu Jeng | 2023-09-05 |
| 11742322 | Integrated fan-out package having stress release structure | Po-Chen Lai, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng | 2023-08-29 |
| 11728256 | Reinforcing package using reinforcing patches | Chia-Kuei Hsu, Po-Yao Lin, Shuo-Mao Chen, Feng-Cheng Hsu, Shin-Puu Jeng | 2023-08-15 |
| 11728284 | Chip package structure and method for forming the same | Po-Chen Lai, Chin-Hua Wang, Chia-Kuei Hsu, Li-Ling Liao, Po-Yao Lin +1 more | 2023-08-15 |
| 11721643 | Package structure | Po-Chen Lai, Chin-Hua Wang, Che-Chia Yang, Shu-Shen Yeh, Po-Yao Lin +1 more | 2023-08-08 |
| 11705406 | Package structure and method for forming the same | Po-Chen Lai, Chin-Hua Wang, Li-Ling Liao, Tsung-Yen Lee, Po-Yao Lin +1 more | 2023-07-18 |
| 11705420 | Multi-bump connection to interconnect structure and manufacturing method thereof | Tsung-Yen Lee, Chia-Kuei Hsu, Shang-Lun Tsai, Po-Yao Lin | 2023-07-18 |
| 11699668 | Semiconductor device package having warpage control and method of forming the same | Shu-Shen Yeh, Che-Chia Yang, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng | 2023-07-11 |
| 11694941 | Semiconductor die package with multi-lid structures and method for forming the same | Shu-Shen Yeh, Che-Chia Yang, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng | 2023-07-04 |
| 11652037 | Semiconductor package and method of manufacture | Chia-Kuei Hsu, Po-Chen Lai, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng | 2023-05-16 |
| 11610835 | Organic interposer including intra-die structural reinforcement structures and methods of forming the same | Li-Ling Liao, Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng | 2023-03-21 |
| 11610854 | Semiconductor device and method of manufacture | Po-Hao Tsai, Po-Yao Chuang, Shin-Puu Jeng | 2023-03-21 |
| 11600575 | Method for forming chip package structure | Shin-Puu Jeng, Techi Wong, Po-Yao Lin, Po-Hao Tsai, Po-Yao Chuang | 2023-03-07 |
| 11594477 | Semiconductor package and method of manufacturing semiconductor package | Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng | 2023-02-28 |
| 11557559 | Package structure | Tsung-Yen Lee, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng | 2023-01-17 |
| 11527457 | Package structure with buffer layer embedded in lid layer | Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng | 2022-12-13 |
| 11393746 | Reinforcing package using reinforcing patches | Chia-Kuei Hsu, Po-Yao Lin, Shuo-Mao Chen, Feng-Cheng Hsu, Shin-Puu Jeng | 2022-07-19 |
| 11329008 | Method for manufacturing semiconductor package for warpage control | Chen-Shien Chen, Ming-Da Cheng, Yu-Tse Su | 2022-05-10 |
| 11329006 | Semiconductor device package with warpage control structure | Fu-Jen Li, Po-Yao Lin, Kuo-Chuan Liu | 2022-05-10 |
| 11282756 | Organic interposer including stress-resistant bonding structures and methods of forming the same | Tsung-Yen Lee, Chin-Hua Wang, Chia-Kuei Hsu, Po-Chen Lai, Po-Yao Lin +1 more | 2022-03-22 |
| 11282803 | Device, semiconductor package and method of manufacturing semiconductor package | Chia-Kuei Hsu, Po-Hao Tsai, Po-Yao Lin, Shin-Puu Jeng | 2022-03-22 |
| 11270953 | Structure and formation method of chip package with shielding structure | Po-Yao Chuang, Po-Hao Tsai, Shin-Puu Jeng, Shuo-Mao Chen | 2022-03-08 |
| 11264359 | Chip bonded to a redistribution structure with curved conductive lines | Chia-Kuei Hsu, Shu-Shen Yeh, Che-Chia Yang, Po-Yao Lin, Shin-Puu Jeng | 2022-03-01 |
| 11201142 | Semiconductor package, package on package structure and method of froming package on package structure | Li-Hsien Huang, Chi-Hsi Wu, Chen-Hua Yu, Der-Chyang Yeh, Hua-Wei Tseng +2 more | 2021-12-14 |
| 11164754 | Fan-out packages and methods of forming the same | Po-Hao Tsai, Chia-Kuei Hsu, Shin-Puu Jeng, Po-Yao Chuang, Meng-Liang Lin +2 more | 2021-11-02 |