Issued Patents All Time
Showing 176–200 of 549 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10629547 | Redistribution-layer fanout package stiffener | — | 2020-04-21 |
| 10629477 | Raised via for terminal connections on different planes | Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Ming-Shih Yeh +1 more | 2020-04-21 |
| 10622297 | Semiconductor device and method | Chi-Hsi Wu, Chen-Hua Yu, Po-Hao Tsai | 2020-04-14 |
| 10586763 | Semiconductor device and method of manufacture | Hsien-Ju Tsou, Chih-Wei Wu, Pu Wang, Szu-Wei Lu, Ying-Ching Shih | 2020-03-10 |
| 10553569 | Multi-die structure and method for forming same | Chen-Hua Yu, Po-Hao Tsai, Li-Hui Cheng | 2020-02-04 |
| 10541213 | Backside redistribution layer (RDL) structure | Po-Hao Tsai | 2020-01-21 |
| 10535639 | Semiconductor device and manufacturing method of the same | Ying-Ching Shih, Pu Wang, Chen-Hua Yu | 2020-01-14 |
| 10535627 | Printing module, printing method and system of forming a printed structure | Li-Hui Cheng, Po-Hao Tsai, Chih-Chien Pan | 2020-01-14 |
| 10535591 | Semiconductor device and method of manufacturing the same | Li-Hui Cheng, Po-Hao Tsai | 2020-01-14 |
| 10535580 | Thermal dissipation through seal rings in 3DIC structure | Shih-Yi Syu | 2020-01-14 |
| 10529690 | Package structures and methods of forming the same | Ying-Ching Shih, Chi-Hsi Wu, Chen-Hua Yu, Chih-Wei Wu, Pu Wang +1 more | 2020-01-07 |
| 10529673 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Po-Hao Tsai, Jui-Pin Hung | 2020-01-07 |
| 10522476 | Package structure, integrated fan-out package and method of fabricating the same | Li-Hui Cheng, Po-Hao Tsai | 2019-12-31 |
| 10522496 | Method for a stacked and bonded semiconductor device | Li-Hui Cheng, Po-Hao Tsai | 2019-12-31 |
| 10518387 | Grinding element, grinding wheel and manufacturing method of semiconductor package using the same | Yi-Chao Mao, Chin-Chuan Chang, Wen-Hua Chang | 2019-12-31 |
| 10522439 | Semiconductor package device | Nai-Wei Liu, Jui-Pin Hung | 2019-12-31 |
| 10515901 | InFO-POP structures with TIVs having cavities | Chen-Hua Yu, Po-Hao Tsai | 2019-12-24 |
| 10515904 | Method for forming chip package structure | Po-Hao Tsai | 2019-12-24 |
| 10515937 | Semiconductor device and method of manufacture | Po-Hao Tsai, Li-Hui Cheng, Porter Chen | 2019-12-24 |
| 10515923 | Method for forming semiconductor package structure with twinned copper layer | Jung-Hua Chang, Po-Hao Tsai | 2019-12-24 |
| 10515875 | Interconnect structure for package-on-package devices | Jui-Pin Hung, Po-Hao Tsai, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2019-12-24 |
| 10510595 | Integrated fan-out packages and methods of forming the same | Chih-Wei Wu, Ying-Ching Shih, Szu-Wei Lu, Long Hua Lee | 2019-12-17 |
| 10510634 | Package structure and method | Szu-Wei Lu, Chen-Hua Yu | 2019-12-17 |
| 10510684 | Three dimensional integrated circuit (3DIC) with support structures | Chih-Wei Wu, Ying-Ching Shih, Szu-Wei Lu | 2019-12-17 |
| 10510732 | PoP device and method of forming the same | Hsien-Ju Tsou, Chih-Wei Wu, Pu Wang, Szu-Wei Lu, Ying-Ching Shih | 2019-12-17 |