Issued Patents All Time
Showing 1,626–1,650 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8361842 | Embedded wafer-level bonding approaches | Jing-Cheng Lin | 2013-01-29 |
| 8361895 | Ultra-shallow junctions using atomic-layer doping | Jing-Cheng Lin | 2013-01-29 |
| 8362593 | Method for stacking semiconductor dies | Ku-Feng Yang, Weng-Jin Wu, Wen-Chih Chiou | 2013-01-29 |
| 8344506 | Interface structure for copper-copper peeling integrity | Cheng-Chung Lin, Chung-Shi Liu | 2013-01-01 |
| 8344513 | Barrier for through-silicon via | Wen-Chih Chiou, Weng-Jin Wu | 2013-01-01 |
| 8338884 | Selective epitaxial growth of semiconductor materials with reduced defects | Jing-Cheng Lin | 2012-12-25 |
| 8338945 | Molded chip interposer structure and methods | Chun-Hui Yu, Jing-Cheng Lin | 2012-12-25 |
| 8334220 | Method of selectively forming a silicon nitride layer | — | 2012-12-18 |
| 8329578 | Via structure and via etching process of forming the same | Hung-Pin Chang, Wen-Chih Chiou | 2012-12-11 |
| 8324731 | Integrated circuit device | Shwang-Ming Jeng, Yung-Cheng Lu, Huilin Chang, Ting-Yu Shen, Yichi Liao | 2012-12-04 |
| 8322299 | Cluster processing apparatus for metallization processing in semiconductor manufacturing | Minghsing Tsai, Yi-Li Hsiao | 2012-12-04 |
| 8324738 | Self-aligned protection layer for copper post structure | Chung-Shi Liu | 2012-12-04 |
| 8319349 | Approach for bonding dies onto interposers | Hsien-Pin Hu, Shin-Puu Jeng, Shang-Yun Hou, Jing-Cheng Lin, Wen-Chih Chiou +1 more | 2012-11-27 |
| 8319342 | Interconnect structures having permeable hard mask for sealing air gap contained by conductive structures | Chung-Shi Liu | 2012-11-27 |
| 8319336 | Reduction of etch microloading for through silicon vias | Hung-Pin Chang | 2012-11-27 |
| 8293616 | Methods of fabrication of semiconductor devices with low capacitance | Cheng-Hung Chang, Yu-Rung Hsu | 2012-10-23 |
| 8294274 | Semiconductor contact barrier | Chung-Shi Liu | 2012-10-23 |
| 8294201 | High-k gate dielectric and method of manufacture | Liang-Gi Yao | 2012-10-23 |
| 8278679 | LED device with embedded top electrode | Ding-Yuan Chen, Wen-Chih Chiou | 2012-10-02 |
| 8276648 | PVD target with end of service life detection capability | Yi-Li Hsiao, Jean Wang, Lawrance Sheu | 2012-10-02 |
| 8278125 | Group-III nitride epitaxial layer on silicon substrate | Ding-Yuan Chen | 2012-10-02 |
| 8264066 | Liner formation in 3DIC structures | Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou | 2012-09-11 |
| 8263462 | Dielectric punch-through stoppers for forming FinFETs having dual fin heights | Shih-Ting Hung, Cheng-Hung Chang, Chen-Yi Lee, Chen-Nan Yeh | 2012-09-11 |
| 8247285 | N-FET with a highly doped source/drain and strain booster | Jing-Cheng Lin | 2012-08-21 |
| 8237272 | Conductive pillar structure for semiconductor substrate and method of manufacture | Hung-Jui Kuo, Chung-Shi Liu | 2012-08-07 |