Issued Patents All Time
Showing 101–125 of 360 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11424335 | Group III-V semiconductor devices having dual workfunction gate electrodes | Sean T. Ma, Gilbert Dewey, Cheng-Ying Huang, Dipanjan Basu | 2022-08-23 |
| 11424160 | Self-aligned local interconnects | Aaron D. Lilak, Ehren Mannebach, Anh Phan, Richard E. Schenker, Stephanie A. Bojarski +5 more | 2022-08-23 |
| 11417655 | High-mobility semiconductor source/drain spacer | Gilbert Dewey, Matthew V. Metz, Anand S. Murthy, Tahir Ghani, Chandra S. Mohapatra +2 more | 2022-08-16 |
| 11411119 | Double gated thin film transistors | Aaron D. Lilak, Van H. Le, Abhishek A. Sharma, Tahir Ghani, Rishabh Mehandru +1 more | 2022-08-09 |
| 11404562 | Tunneling field effect transistors | Cheng-Ying Huang, Matthew V. Metz, Ashish Agrawal, Benjamin Chu-Kung, Uygar E. Avci +2 more | 2022-08-02 |
| 11398479 | Heterogeneous Ge/III-V CMOS transistor structures | Abhishek A. Sharma, Ravi Pillarisetty, Patrick Morrow, Rishabh Mehandru, Aaron D. Lilak +2 more | 2022-07-26 |
| 11398478 | Semiconductor nanowire device having (111)-plane channel sidewalls | Cory E. Weber, Harold W. Kennel, Gilbert Dewey | 2022-07-26 |
| 11393818 | Stacked transistors with Si PMOS and high mobility thin film transistor NMOS | Gilbert Dewey, Ravi Pillarisetty, Abhishek A. Sharma, Aaron D. Lilak, Rishabh Mehandru +5 more | 2022-07-19 |
| 11393722 | Isolation wall stressor structures to improve channel stress and their methods of fabrication | Aaron D. Lilak, Christopher J. Jezewski, Rishabh Mehandru, Gilbert Dewey, Anh Phan | 2022-07-19 |
| 11387320 | Transistors with high concentration of germanium | Anand S. Murthy, Glenn A. Glass, Tahir Ghani, Ravi Pillarisetty, Niloy Mukherjee +3 more | 2022-07-12 |
| 11387238 | Non-silicon N-Type and P-Type stacked transistors for integrated circuit devices | Gilbert Dewey, Patrick Morrow, Ravi Pillarisetty, Rishabh Mehandru, Cheng-Ying Huang +1 more | 2022-07-12 |
| 11380684 | Stacked transistor architecture including nanowire or nanoribbon thin film transistors | Gilbert Dewey, Aaron D. Lilak, Cheng-Ying Huang, Jack T. Kavalieros, Anh Phan +4 more | 2022-07-05 |
| 11374024 | Integrated circuits with stacked transistors and methods of manufacturing the same using processes which fabricate lower gate structures following completion of portions of an upper transistor | Aaron D. Lilak, Rishabh Mehandru, Gilbert Dewey, Anh Phan | 2022-06-28 |
| 11374004 | Pedestal fin structure for stacked transistor integration | Aaron D. Lilak, Rishabh Mehandru, Anh Phan, Gilbert Dewey, Stephen M. Cea +5 more | 2022-06-28 |
| 11367789 | Source/drain recess etch stop layers and bottom wide-gap cap for III-V MOSFETs | Cheng-Ying Huang, Matthew V. Metz, Gilbert Dewey, Jack T. Kavalieros, Sean T. Ma +1 more | 2022-06-21 |
| 11367722 | Stacked nanowire transistor structure with different channel geometries for stress | Aaron D. Lilak, Stephen M. Cea, Gilbert Dewey, Roza Kotlyar, Rishabh Mehandru +4 more | 2022-06-21 |
| 11362189 | Stacked self-aligned transistors with single workfunction metal | Aaron D. Lilak, Rishabh Mehandru, Gilbert Dewey, Justin R. Weber | 2022-06-14 |
| 11362188 | Field effect transistors with reduced electric field by thickening dielectric on the drain side | Dipanjan Basu, Sean T. Ma, Jack T. Kavalieros | 2022-06-14 |
| 11355621 | Non-planar semiconductor device including a replacement channel structure | Gilbert Dewey, Sean T. Ma, Nicholas G. Minutillo, Tahir Ghani, Matthew V. Metz +2 more | 2022-06-07 |
| 11348916 | Leave-behind protective layer having secondary purpose | Aaron D. Lilak, Anh Phan, Ehren Mannebach, Cheng-Ying Huang, Stephanie A. Bojarski +2 more | 2022-05-31 |
| 11342457 | Strained thin film transistors | Prashant Majhi, Brian S. Doyle, Abhishek A. Sharma, Elijah V. Karpov, Ravi Pillarisetty +1 more | 2022-05-24 |
| 11342432 | Gate-all-around integrated circuit structures having insulator fin on insulator substrate | Aaron D. Lilak, Rishabh Mehandru, Cory E. Weber, Varun MISHRA | 2022-05-24 |
| 11342327 | Stacked transistor layout | Ravi Pillarisetty, Abhishek A. Sharma, Gilbert Dewey, Jack T. Kavalieros | 2022-05-24 |
| 11342227 | Stacked transistor structures with asymmetrical terminal interconnects | Aaron D. Lilak, Ehren Mannebach, Nafees Kabir, Patrick Morrow, Gilbert Dewey +1 more | 2022-05-24 |
| 11335796 | Source to channel junction for III-V metal-oxide-semiconductor field effect transistors (MOSFETs) | Cheng-Ying Huang, Matthew V. Metz, Gilbert Dewey, Sean T. Ma, Jack T. Kavalieros | 2022-05-17 |