Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11749560 | Cladded metal interconnects | Zhiyong Ma, Miriam Reshotko, Christopher J. Jezewski, Flavio Griggio, Rahim Kasim +1 more | 2023-09-05 |
| 8421225 | Three-dimensional stacked substrate arrangements | Shriram Ramanathan, Patrick Morrow, Scott List, Michael Chan, Mauro J. Kobrinsky +3 more | 2013-04-16 |
| 8203208 | Three-dimensional stacked substrate arrangements | Shriram Ramanathan, Patrick Morrow, Scott List, Michael Chan, Mauro J. Kobrinsky +3 more | 2012-06-19 |
| 7973407 | Three-dimensional stacked substrate arrangements | Shriram Ramanathan, Patrick Morrow, Scott List, Michael Chan, Mauro J. Kobrinsky +3 more | 2011-07-05 |
| 7220674 | Copper alloys for interconnections having improved electromigration characteristics and methods of making same | Paul McGregor, Carolyn Block, Shu Jin | 2007-05-22 |
| 6977220 | Copper alloys for interconnections having improved electromigration characteristics and methods of making same | Paul McGregor, Carolyn Block, Shu Jin | 2005-12-20 |
| 6838299 | Forming defect prevention trenches in dicing streets | Rose Mulligan, Jun He, Susanne Menezes, Steven Towle | 2005-01-04 |
| 6800554 | Copper alloys for interconnections having improved electromigration characteristics and methods of making same | Paul McGregor, Carolyn Block, Shu Jin | 2004-10-05 |
| 6794755 | Surface alteration of metal interconnect in integrated circuits for electromigration and adhesion improvement | Jose Maiz, Xiaorong Morrow, Carolyn Block, Jihperng Leu, Paul McGregor +2 more | 2004-09-21 |
| 6777810 | Interconnection alloy for integrated circuits | Donald S. Gardner | 2004-08-17 |
| 6740427 | Thermo-mechanically robust C4 ball-limiting metallurgy to prevent failure due to die-package interaction and method of making same | Madhav Datta, Dave Emory, Tzeun-luh Huang, Subhash M. Joshi, Christine A. King +4 more | 2004-05-25 |
| 6646340 | Thermally coupling electrically decoupling cooling device for integrated circuits | Timothy L. Deeter, Daniel James Murray, Daniel Pantuso, Sarangapani Sista | 2003-11-11 |
| 6525419 | Thermally coupling electrically decoupling cooling device for integrated circuits | Timothy L. Deeter, Daniel James Murray, Daniel Pantuso, Sarangapani Sista | 2003-02-25 |
| 6309956 | Fabricating low K dielectric interconnect systems by using dummy structures to enhance process | Chien Chiang, David B. Fraser, Anne S. Mack, Jin Lee, Sing-Mo Tzeng +3 more | 2001-10-30 |
| 6303464 | Method and structure for reducing interconnect system capacitance through enclosed voids in a dielectric layer | Eng T. Gaw, Quat Vu, David B. Fraser, Chien Chiang, Ian A. Young | 2001-10-16 |
| 6100709 | Silicon wafer testing rig and a method for testing a silicon wafer wherein the silicon wafer is bent into a dome shape | Krishna Seshan, Donald L. Scharfetter | 2000-08-08 |
| 5909635 | Cladding of an interconnect for improved electromigration performance | Donald S. Gardner, Quat Vu | 1999-06-01 |