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USPTO Patent Rankings Data through Dec 31, 2025
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Xiaorong Morrow — 8 Patents

Intel: 7 patents #5,443 of 30,777Top 20%
INIntle: 1 patents #1 of 16Top 7%
Portland, OR: #2,054 of 9,213 inventorsTop 25%
Oregon: #5,193 of 28,073 inventorsTop 20%
Overall (All Time): #600,572 of 4,157,543Top 15%
8 Patents All Time
Xiaorong Morrow has been granted 8 US patents while listed as an inventor at Intel. The first was granted in 2002 and the most recent in October 2012. Xiaorong Morrow ranks #600,572 of 4,157,543 US inventors in our database (top 14.4%). Patent records list Xiaorong Morrow in Portland, OR, US.

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
8299617 Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects Jihperng Leu, Markus Kuhn, Jose Maiz 2012-10-30
7727892 Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects Jihperng Leu, Markus Kuhn, Jose Maiz 2010-06-01 $13,475,000
7456490 Sealing porous dielectrics with silane coupling reagents Grant Kloster, Chih-I Wu 2008-11-25 $14,078,000
7339271 Metal-metal oxide etch stop/barrier for integrated circuit interconnects Jihperng Leu, Markus Kuhn, Jose Maiz 2008-03-04 $16,330,000
7122481 Sealing porous dielectrics with silane coupling reagents Grant Kloster, Chih-I Wu 2006-10-17 $12,433,000
6794755 Surface alteration of metal interconnect in integrated circuits for electromigration and adhesion improvement Jose Maiz, Thomas Marieb, Carolyn Block, Jihperng Leu, Paul McGregor +2 more 2004-09-21 $17,403,000
6661094 Semiconductor device having a dual damascene interconnect spaced from a support structure Patrick Morrow 2003-12-09 $40,688,000
6448177 Method of making a semiconductor device having a dual damascene interconnect spaced from a support structure Patrick Morrow 2002-09-10 $32,074,000