Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8299617 | Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects | Jihperng Leu, Markus Kuhn, Jose Maiz | 2012-10-30 |
| 7727892 | Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects | Jihperng Leu, Markus Kuhn, Jose Maiz | 2010-06-01 |
| 7456490 | Sealing porous dielectrics with silane coupling reagents | Grant Kloster, Chih-I Wu | 2008-11-25 |
| 7339271 | Metal-metal oxide etch stop/barrier for integrated circuit interconnects | Jihperng Leu, Markus Kuhn, Jose Maiz | 2008-03-04 |
| 7122481 | Sealing porous dielectrics with silane coupling reagents | Grant Kloster, Chih-I Wu | 2006-10-17 |
| 6794755 | Surface alteration of metal interconnect in integrated circuits for electromigration and adhesion improvement | Jose Maiz, Thomas Marieb, Carolyn Block, Jihperng Leu, Paul McGregor +2 more | 2004-09-21 |
| 6661094 | Semiconductor device having a dual damascene interconnect spaced from a support structure | Patrick Morrow | 2003-12-09 |
| 6448177 | Method of making a semiconductor device having a dual damascene interconnect spaced from a support structure | Patrick Morrow | 2002-09-10 |