SK

Sarah Kim

IN Intel: 44 patents #769 of 30,777Top 3%
KAIST: 1 patents #5,996 of 11,619Top 55%
LG: 1 patents #17,402 of 26,165Top 70%
Overall (All Time): #58,155 of 4,157,543Top 2%
48
Patents All Time

Issued Patents All Time

Showing 25 most recent of 48 patents

Patent #TitleCo-InventorsDate
12092535 Stitched sensor for deleting or measuring acting force Paul Hofmann 2024-09-17
11232996 Semiconductor device package comprising thermal interface layer and method of fabricating of the same Sunyong Lee, Tae Hyeob Im 2022-01-25
10327285 Heating element and method for manufacturing same Jiehyun Seong, Hyeon Choi, Seung Heon Lee 2019-06-18
8421225 Three-dimensional stacked substrate arrangements Shriram Ramanathan, Patrick Morrow, Scott List, Michael Chan, Mauro J. Kobrinsky +3 more 2013-04-16
8203208 Three-dimensional stacked substrate arrangements Shriram Ramanathan, Patrick Morrow, Scott List, Michael Chan, Mauro J. Kobrinsky +3 more 2012-06-19
7973407 Three-dimensional stacked substrate arrangements Shriram Ramanathan, Patrick Morrow, Scott List, Michael Chan, Mauro J. Kobrinsky +3 more 2011-07-05
7842553 Cooling micro-channels R. Scott List, Alan M. Myers 2010-11-30
7723208 Integrated re-combiner for electroosmotic pumps using porous frits R. Scott List, James G. Maveety, Alan M. Myers, Quat Vu 2010-05-25
7696015 Method of forming a stack of heat generating integrated circuit chips with intervening cooling integrated circuit chips R. Scott List, James G. Maveety, Alan M. Myers, Quat Vu 2010-04-13
7615462 Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack R. Scott List, Tom Letson 2009-11-10
7576432 Using external radiators with electroosmotic pumps for cooling integrated circuits R. Scott List, James G. Maveety, Alan M. Myers, Quat Vu, Ravi Prasher +2 more 2009-08-18
7537954 Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same Shriram Ramanathan, R. Scott List, Gregory M. Chrysler 2009-05-26
7410884 3D integrated circuits using thick metal for backside connections and offset bumps Shriram Ramanathan, Patrick Morrow 2008-08-12
7348217 Method and structure for interfacing electronic devices Mauro J. Kobrinsky, R. Scott List, Michael C. Harmes 2008-03-25
7274106 Packaged electroosmotic pumps using porous frits for cooling integrated circuits R. Scott List, James G. Maveety, Alan M. Myers, Quat Vu 2007-09-25
7271434 Capacitor with insulating nanostructure Scot Kellar 2007-09-18
7265406 Capacitor with conducting nanostructure Scot Kellar 2007-09-04
7244983 Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode Scot Kellar 2007-07-17
7227257 Cooling micro-channels R. Scott List, Alan M. Myers 2007-06-05
7183648 Method and apparatus for low temperature copper to copper bonding Shriram Ramanathan 2007-02-27
7157787 Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices R. Scott List, Scot Kellar 2007-01-02
7148565 Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack R. Scott List, Tom Letson 2006-12-12
7105382 Self-aligned electrodes contained within the trenches of an electroosmotic pump Alan M. Myers, R. Scott List 2006-09-12
7105925 Differential planarization James A. Boardman, Paul B. Fischer, Mauro J. Kobrinsky 2006-09-12
7091084 Ultra-high capacitance device based on nanostructures Scot Kellar 2006-08-15