Issued Patents All Time
Showing 25 most recent of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12261057 | Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and vias | Kevin Lin, Robert L. Bristol | 2025-03-25 |
| 11276581 | Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and vias | Kevin Lin, Robert L. Bristol | 2022-03-15 |
| 10366903 | Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and vias | Kevin Lin, Robert L. Bristol | 2019-07-30 |
| 10147639 | Via self alignment and shorting improvement with airgap integration capacitance benefit | Kanwal Jit Singh | 2018-12-04 |
| 10032643 | Method and structure to contact tight pitch conductive layers with guided vias using alternating hardmasks and encapsulating etchstop liner scheme | Jasmeet S. Chawla, Ruth A. Brain, Richard E. Schenker, Kanwal Jit Singh | 2018-07-24 |
| 9887161 | Techniques for forming interconnects in porous dielectric materials | Christopher J. Jezewski, David J. Michalak, Kanwal Jit Singh | 2018-02-06 |
| 9754886 | Semiconductor interconnect structures | Boyan Boyanov, Kanwal Jit Singh, James S. Clarke | 2017-09-05 |
| 9553018 | Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects | Robert L. Bristol, Kevin Lin, Kanwal Jit Singh, Richard E. Schenker | 2017-01-24 |
| 9548269 | Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects | Kanwal Jit Singh, Robert L. Bristol, Jasmeet S. Chawla | 2017-01-17 |
| 9455224 | Semiconductor interconnect structures | Boyan Boyanov, Kanwal Jit Singh, James S. Clarke | 2016-09-27 |
| 9406615 | Techniques for forming interconnects in porous dielectric materials | Christopher J. Jezewski, David J. Michalak, Kanwal Jit Singh | 2016-08-02 |
| 9406512 | Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects | Robert L. Bristol, James M. Blackwell, Kanwal Jit Singh | 2016-08-02 |
| 9379010 | Methods for forming interconnect layers having tight pitch interconnect structures | Christopher J. Jezewski, Jasmeet S. Chawla, Kanwal Jit Singh, Elliot N. Tan, Richard E. Schenker | 2016-06-28 |
| 9236342 | Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects | Robert L. Bristol, Kevin Lin, Kanwal Jit Singh, Richard E. Schenker | 2016-01-12 |
| 9209077 | Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects | Kanwal Jit Singh, Robert L. Bristol, Jasmeet S. Chawla | 2015-12-08 |
| 9064872 | Semiconductor interconnect structures | Boyan Boyanov, Kanwal Jit Singh, James S. Clarke | 2015-06-23 |
| 9041217 | Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects | Robert L. Bristol, James M. Blackwell, Kanwal Jit Singh | 2015-05-26 |
| 8772938 | Semiconductor interconnect structures | Boyan Boyanov, Kanwal Jit Singh, James S. Clarke | 2014-07-08 |
| 7842553 | Cooling micro-channels | Sarah Kim, R. Scott List | 2010-11-30 |
| 7723208 | Integrated re-combiner for electroosmotic pumps using porous frits | Sarah Kim, R. Scott List, James G. Maveety, Quat Vu | 2010-05-25 |
| 7696015 | Method of forming a stack of heat generating integrated circuit chips with intervening cooling integrated circuit chips | Sarah Kim, R. Scott List, James G. Maveety, Quat Vu | 2010-04-13 |
| 7667319 | Electroosmotic pump using nanoporous dielectric frit | R. Scott List, Quat Vu | 2010-02-23 |
| 7663230 | Methods of forming channels on an integrated circuit die and die cooling systems including such channels | Shriram Ramanathan, Chin-Chang Cheng | 2010-02-16 |
| 7645368 | Orientation independent electroosmotic pump | Juan Santiago, Shuhuai Yao, Jonathan Posner | 2010-01-12 |
| 7576432 | Using external radiators with electroosmotic pumps for cooling integrated circuits | Sarah Kim, R. Scott List, James G. Maveety, Quat Vu, Ravi Prasher +2 more | 2009-08-18 |