{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Intel", "item": "https://www.patentleaderboard.com/company/intel"}, {"@type": "ListItem", "position": 3, "name": "Kanwal Jit Singh", "item": "https://www.patentleaderboard.com/inventor/fl:ka_ln:singh-12"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
KS

Kanwal Jit Singh — 24 Patents

Intel: 24 patents #1,653 of 30,777Top 6%
Hillsboro, OR: #175 of 2,365 inventorsTop 8%
Oregon: #1,754 of 28,073 inventorsTop 7%
Overall (All Time): #168,038 of 4,157,543Top 5%
24 Patents All Time
Kanwal Jit Singh has been granted 24 US patents while listed as an inventor at Intel. The first was granted in 2011 and the most recent in July 2020. Kanwal Jit Singh ranks #168,038 of 4,157,543 US inventors in our database (top 4.0%). Patent records list Kanwal Jit Singh in Hillsboro, OR, US.

Patents per Year

Patents granted per year, 2011 to 2020Bar chart with a peak of 6 patents in 2016.peak 62011: 1 patents20112014: 1 patents20142015: 3 patents20152016: 6 patents20162017: 6 patents20172018: 3 patents20182019: 2 patents20192020: 2 patents2020

Issued Patents All Time

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10727183 Methods and apparatuses to form self-aligned caps Boyan Boyanov 2020-07-28 $26,273,000
10593627 Doric pillar supported maskless airgap structure for capacitance benefit with unlanded via solution Kevin Lin, Robert L. Bristol 2020-03-17 $21,927,000
10457548 Integrating MEMS structures with interconnects and vias Kevin Lin, Chytra Pawashe, Raseong Kim, Ian A. Young, Robert L. Bristol 2019-10-29 $25,165,000
10446493 Methods and apparatuses to form self-aligned caps Boyan Boyanov 2019-10-15 $18,012,000
10147639 Via self alignment and shorting improvement with airgap integration capacitance benefit Alan M. Myers 2018-12-04 $23,085,000
10032643 Method and structure to contact tight pitch conductive layers with guided vias using alternating hardmasks and encapsulating etchstop liner scheme Jasmeet S. Chawla, Ruth A. Brain, Richard E. Schenker, Alan M. Myers 2018-07-24 $23,531,000
9887161 Techniques for forming interconnects in porous dielectric materials Christopher J. Jezewski, David J. Michalak, Alan M. Myers 2018-02-06 $17,987,000
9754886 Semiconductor interconnect structures Boyan Boyanov, James S. Clarke, Alan M. Myers 2017-09-05 $9,844,000
9659869 Forming barrier walls, capping, or alloys /compounds within metal lines Christopher J. Jezewski, Alan M Meyers, Tejaswi K. Indukuri, James S. Clarke, Florian Gstrein 2017-05-23 $7,972,000
9627321 Methods and apparatuses to form self-aligned caps Boyan Boyanov 2017-04-18 $8,310,000
9565766 Formation of DRAM capacitor among metal interconnect Nick Lindert, Joseph M. Steigerwald 2017-02-07 $9,424,000
9553018 Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects Robert L. Bristol, Kevin Lin, Alan M. Myers, Richard E. Schenker 2017-01-24 $12,666,000
9548269 Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects Alan M. Myers, Robert L. Bristol, Jasmeet S. Chawla 2017-01-17 $15,866,000
9455224 Semiconductor interconnect structures Boyan Boyanov, James S. Clarke, Alan M. Myers 2016-09-27 $16,083,000
9406512 Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects Robert L. Bristol, James M. Blackwell, Alan M. Myers 2016-08-02 $8,723,000
9406615 Techniques for forming interconnects in porous dielectric materials Christopher J. Jezewski, David J. Michalak, Alan M. Myers 2016-08-02 $8,723,000
9379010 Methods for forming interconnect layers having tight pitch interconnect structures Christopher J. Jezewski, Jasmeet S. Chawla, Alan M. Myers, Elliot N. Tan, Richard E. Schenker 2016-06-28 $11,945,000
9373584 Methods and apparatuses to form self-aligned caps Boyan Boyanov 2016-06-21 $13,200,000
9236342 Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects Robert L. Bristol, Kevin Lin, Alan M. Myers, Richard E. Schenker 2016-01-12 $15,498,000
9209077 Diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects Alan M. Myers, Robert L. Bristol, Jasmeet S. Chawla 2015-12-08 $12,754,000
9064872 Semiconductor interconnect structures Boyan Boyanov, James S. Clarke, Alan M. Myers 2015-06-23 $16,735,000
9041217 Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects Robert L. Bristol, James M. Blackwell, Alan M. Myers 2015-05-26 $20,586,000
8772938 Semiconductor interconnect structures Boyan Boyanov, James S. Clarke, Alan M. Myers 2014-07-08 $15,420,000
8080475 Removal chemistry for selectively etching metal hard mask Vijayakumar Ramachandrarao 2011-12-20 $34,401,000