Issued Patents All Time
Showing 126–150 of 163 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7704804 | Method of forming a crack stop laser fuse with fixed passivation layer coverage | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2010-04-27 |
| 7682961 | Methods of forming solder connections and structure thereof | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2010-03-23 |
| 7674637 | Monitoring cool-down stress in a flip chip process using monitor solder bump structures | Charles F. Carey, Bernt Julius Hansen, Ashwani K. Malhotra, David L. Questad | 2010-03-09 |
| 7635643 | Method for forming C4 connections on integrated circuit chips and the resulting devices | Timothy H. Daubenspeck, Mukta G. Farooq, Jeffrey P. Gambino, Christopher D. Muzzy, Kevin S. Petrarca | 2009-12-22 |
| 7614147 | Method of creating contour structures to highlight inspection region | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-11-10 |
| 7601628 | Wire and solder bond forming methods | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-10-13 |
| 7572726 | Method of forming a bond pad on an I/C chip and resulting structure | Julie C. Biggs, Tien-Jen Cheng, David E. Eichstadt, Lisa A. Fanti, Jonathan H. Griffith +6 more | 2009-08-11 |
| 7547576 | Solder wall structure in flip-chip technologies | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-06-16 |
| 7545050 | Design structure for final via designs for chip stress reduction | Timothy H. Daubenspeck, Jeffrey P. Gambino, David L. Questad | 2009-06-09 |
| 7541272 | Damascene patterning of barrier layer metal for C4 solder bumps | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-06-02 |
| 7521287 | Wire and solder bond forming methods | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-04-21 |
| 7517789 | Solder bumps in flip-chip technologies | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-04-14 |
| 7485564 | Undercut-free BLM process for Pb-free and Pb-reduced C4 | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-02-03 |
| 7482675 | Probing pads in kerf area for wafer testing | James W. Adkisson, Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2009-01-27 |
| 7482258 | Product and method for integration of deep trench mesh and structures under a bond pad | Ephrem G. Gebreselasie, William T. Motsiff, Steven H. Voldman | 2009-01-27 |
| 7462509 | Dual-sided chip attached modules | Kerry Bernstein, Timothy J. Dalton, Timothy H. Daubenspeck, Jeffrey P. Gambino, Mark D. Jaffe +3 more | 2008-12-09 |
| 7459785 | Electrical interconnection structure formation | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2008-12-02 |
| 7439170 | Design structure for final via designs for chip stress reduction | Timothy H. Daubenspeck, Jeffrey P. Gambino, David L. Questad | 2008-10-21 |
| 7411135 | Contour structures to highlight inspection regions | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2008-08-12 |
| 7405139 | Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch | Timothy H. Daubenspeck, Jeffrey P. Gambino, Jerome B. Lasky, Christopher D. Muzzy | 2008-07-29 |
| 7405108 | Methods for forming co-planar wafer-scale chip packages | Lloyd Burrell, Howard H. Chen, Louis L. Hsu | 2008-07-29 |
| 7348210 | Post bump passivation for soft error protection | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Edmund J. Sprogis | 2008-03-25 |
| 7329951 | Solder bumps in flip-chip technologies | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2008-02-12 |
| 7323780 | Electrical interconnection structure formation | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2008-01-29 |
| 7316940 | Chip dicing | Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy | 2008-01-08 |