JL

Jerome B. Lasky

IBM: 22 patents #4,909 of 70,183Top 7%
Overall (All Time): #197,932 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7989358 Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2011-08-02
7495254 Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devices Jonathan R. Fales 2009-02-24
7405139 Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2008-07-29
6793735 Integrated cobalt silicide process for semiconductor devices Marc W. Cantell, Ronald J. Line, William J. Murphy, Kirk D. Peterson, Prabhat Tiwari 2004-09-21
6638629 Semiconductor temperature monitor Donna K. Johnson, Glenn R. Miller 2003-10-28
6541351 Method for limiting divot formation in post shallow trench isolation processes Peter H. Bartlau, Marc W. Cantell, James D. Weil 2003-04-01
6472232 Semiconductor temperature monitor Donna K. Johnson, Glenn R. Miller 2002-10-29
6255179 Plasma etch pre-silicide clean Marc W. Cantell, Kenneth J. Giewont, Kirk D. Peterson 2001-07-03
6184132 Integrated cobalt silicide process for semiconductor devices Marc W. Cantell, Ronald J. Line, William J. Murphy, Kirk D. Peterson, Prabhat Tiwari 2001-02-06
6121064 STI fill for SOI which makes SOI inspectable Bret Philips, Anthony C. Speranza, Justin W. Wong, Mickey H. Yu 2000-09-19
5888875 Diffusion resistor structure with silicided contact areas, and methods of fabrication thereof 1999-03-30
5675185 Semiconductor structure incorporating thin film transistors with undoped cap oxide layers Bomy Chen, Subhash B. Kulkarni, Randy W. Mann, Edward J. Nowak, Werner Rausch +1 more 1997-10-07
5434109 Oxidation of silicon nitride in semiconductor devices Stephen F. Geissler, Josef W. Korejwa, Pai-Hung Pan 1995-07-18
5291439 Semiconductor memory cell and memory array with inversion layer Bruce A. Kauffmann, Chung H. Lam 1994-03-01
5226732 Emissivity independent temperature measurement systems James S. Nakos, Paul E. Bakeman, Jr., Dale P. Hallock, Scott L. Pennington 1993-07-13
4755478 Method of forming metal-strapped polysilicon gate electrode for FET device John R. Abernathey, John Cronin 1988-07-05
4735679 Method of improving silicon-on-insulator uniformity 1988-04-05
4649627 Method of fabricating silicon-on-insulator transistors with a shared element John R. Abernathey, Wayne Kinney, Scott R. Stiffler 1987-03-17
4601779 Method of producing a thin silicon-on-insulator layer John R. Abernathey, Larry A. Nesbit, Thomas O. Sedgwick, Scott R. Stiffler 1986-07-22
4558508 Process of making dual well CMOS semiconductor structure with aligned field-dopings using single masking step Wayne Kinney, Charles W. Koburger, III, Larry A. Nesbit, Ronald R. Troutman, Francis R. White 1985-12-17
4532700 Method of manufacturing semiconductor structures having an oxidized porous silicon isolation layer Wayne Kinney, Larry A. Nesbit 1985-08-06
4379727 Method of laser annealing of subsurface ion implanted regions Howard H. Hansen, Ronald Silverman 1983-04-12