Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7144769 | Method to achieve increased trench depth, independent of CD as defined by lithography | Kevin K. Chan, Gangadhara S. Mathad, Rajiv Ranade | 2006-12-05 |
| 6821864 | Method to achieve increased trench depth, independent of CD as defined by lithography | Kevin K. Chan, Gangadhara S. Mathad, Rajiv Ranade | 2004-11-23 |
| 6809005 | Method to fill deep trench structures with void-free polysilicon or silicon | Rajiv Ranade, Gangadhara S. Mathad, Kevin K. Chan | 2004-10-26 |
| 6563173 | Silicon-on-insulator chip having an isolation barrier for reliability | Ronald J. Bolam, Dominic J. Schepis | 2003-05-13 |
| 6492684 | Silicon-on-insulator chip having an isolation barrier for reliability | Ronald J. Bolam, Dominic J. Schepis | 2002-12-10 |
| 6281095 | Process of manufacturing silicon-on-insulator chip having an isolation barrier for reliability | Ronald J. Bolam, Dominic J. Schepis | 2001-08-28 |
| 6133610 | Silicon-on-insulator chip having an isolation barrier for reliability and process of manufacture | Ronald J. Bolam, Dominic J. Schepis | 2000-10-17 |
| 6022766 | Semiconductor structure incorporating thin film transistors, and methods for its manufacture | Bomy Chen, Jerome B. Lasky, Randy W. Mann, Edward J. Nowak, Werner Rausch +1 more | 2000-02-08 |
| 5757050 | Field effect transistor having contact layer of transistor gate electrode material | Eric Adler, Randy W. Mann, Werner Rausch, Luigi Ternullo, Jr. | 1998-05-26 |
| 5744384 | Semiconductor structures which incorporate thin film transistors | Eric Adler, Randy W. Mann, Werner Rausch, Luigi Ternullo, Jr. | 1998-04-28 |
| 5675185 | Semiconductor structure incorporating thin film transistors with undoped cap oxide layers | Bomy Chen, Jerome B. Lasky, Randy W. Mann, Edward J. Nowak, Werner Rausch +1 more | 1997-10-07 |
| 5670812 | Field effect transistor having contact layer of transistor gate electrode material | Eric Adler, Randy W. Mann, Werner Rausch, Luigi Ternullo, Jr. | 1997-09-23 |
| 5562770 | Semiconductor manufacturing process for low dislocation defects | Bomy Chen, Terence B. Hook | 1996-10-08 |
| 4504330 | Optimum reduced pressure epitaxial growth process to prevent autodoping | Arun K. Gaind, Michael R. Poponiak | 1985-03-12 |