Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8455366 | Use of an organic planarizing mask for cutting a plurality of gate lines | Nicholas C. M. Fuller, Pratik P. Joshi, Mahmoud Khojasteh, George G. Totir | 2013-06-04 |
| 8367556 | Use of an organic planarizing mask for cutting a plurality of gate lines | Nicholas C. M. Fuller, Pratik P. Joshi, Mahmoud Khojasteh, George G. Totir | 2013-02-05 |
| 7700378 | Method and system for line-dimension control of an etch process | Gary W. Behm, Teresita Q. Magtoto | 2010-04-20 |
| 7291285 | Method and system for line-dimension control of an etch process | Gary W. Behm, Teresita Q. Magtoto | 2007-11-06 |
| 7144769 | Method to achieve increased trench depth, independent of CD as defined by lithography | Kevin K. Chan, Subhash B. Kulkarni, Gangadhara S. Mathad | 2006-12-05 |
| 7091081 | Method for patterning a semiconductor region | Sadanand V. Deshpande, George Worth | 2006-08-15 |
| 6984529 | Fabrication process for a magnetic tunnel junction device | Young Hoon Lee, Ihar Kasko, Joachim Neutzel, Keith Milkove, Russell D. Allen +1 more | 2006-01-10 |
| 6858441 | MRAM MTJ stack to conductive line alignment method | Joachim Nuetzel, Xian Jay Ning, Kia-Seng Low, Gill Yong Lee, Ravikumar Ramachandran | 2005-02-22 |
| 6821900 | Method for dry etching deep trenches in a substrate | Satish D. Athavale, Munir D. Naeem, Gangadhara S. Mathad | 2004-11-23 |
| 6821864 | Method to achieve increased trench depth, independent of CD as defined by lithography | Kevin K. Chan, Subhash B. Kulkarni, Gangadhara S. Mathad | 2004-11-23 |
| 6809005 | Method to fill deep trench structures with void-free polysilicon or silicon | Gangadhara S. Mathad, Kevin K. Chan, Subhash B. Kulkarni | 2004-10-26 |
| 6768155 | Circuit with buried strap including liner | Venkatachalam C. Jaiprakash | 2004-07-27 |
| 6743727 | Method of etching high aspect ratio openings | Gangadhara S. Mathad, Siddhartha Panda | 2004-06-01 |
| 6709917 | Method to increase the etch rate and depth in high aspect ratio structure | Siddhartha Panda, Gangadhara S. Mathad | 2004-03-23 |
| 6605504 | Method of manufacturing circuit with buried strap including a liner | Venkatachalam C. Jaiprakash | 2003-08-12 |
| 6544838 | Method of deep trench formation with improved profile control and surface area | Munir D. Naeem, Gangadhara S. Mathad | 2003-04-08 |
| 6489249 | Elimination/reduction of black silicon in DT etch | Gangadhara S. Mathad | 2002-12-03 |
| 6284666 | Method of reducing RIE lag for deep trench silicon etching | Munir D. Naeem, Gangadhara S. Mathad, Byeong Y. Kim, Stephan Kudelka, Brian Lee +3 more | 2001-09-04 |
| 6103585 | Method of forming deep trench capacitors | Alexander Michaelis, Bertrand Flietner | 2000-08-15 |
| 5891807 | Formation of a bottle shaped trench | K. Paul Muller, Stefan Schmitz | 1999-04-06 |