Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9374122 | Integrated on-chip duplexer for simultaneous wireless transmission | Ali Afsahi | 2016-06-21 |
| 8541247 | Non-volatile memory cell with lateral pinning | Haiwen Xi, Antoine Khoueir, Patrick J. Ryan | 2013-09-24 |
| 8537587 | Dual stage sensing for non-volatile memory | Hai Li, Yiran Chen, Yuan-Yong Yan, Ran Wang | 2013-09-17 |
| 8508981 | Apparatus for variable resistive memory punchthrough access method | Maroun Georges Khoury, Hongyue Liu, Andrew John Carter | 2013-08-13 |
| 8487390 | Memory cell with stress-induced anisotropy | Dimitar V. Dimitrov, Ivan Petrov Ivanov, Shuiyuan Huang, Antoine Khoueir, John D. Stricklin +2 more | 2013-07-16 |
| 8289759 | Non-volatile memory cell with precessional switching | Xiaobin Wang, Yong Lu, Haiwen Xi, Yuankai Zheng, Yiran Chen +3 more | 2012-10-16 |
| 8289748 | Tuning a variable resistance of a resistive sense element | Haiwen Xi, Patrick J. Ryan, Rod V. Bowman | 2012-10-16 |
| 8203865 | Non-volatile memory cell with non-ohmic selection layer | Wei Tian, Insik Jin, Venugopalan Vaithyanathan, Haiwen Xi, Michael Xuefei Tang | 2012-06-19 |
| 8199558 | Apparatus for variable resistive memory punchthrough access method | Maroun Georges Khoury, Hongyue Liu, Andrew John Carter | 2012-06-12 |
| 8197953 | Magnetic stack design | Haiwen Xi, Antoine Khoueir, Pat J. Ryan, Michael Xuefei Tang, Insik Jin +1 more | 2012-06-12 |
| 8098510 | Variable resistive memory punchthrough access method | Maroun Georges Khoury, Hongyue Liu, Andrew John Carter | 2012-01-17 |
| 8050092 | NAND flash memory with integrated bit line capacitance | Chulmin Jung, Harry Hongyue Liu, Yong Lu, Dadi Setiadi | 2011-11-01 |
| 8050072 | Dual stage sensing for non-volatile memory | Hai Li, Yiran Chen, Yuan-Yong Yan, Ran Wang | 2011-11-01 |
| 7961497 | Variable resistive memory punchthrough access method | Maroun Georges Khoury, Hongyue Liu, Andrew John Carter | 2011-06-14 |
| 7939188 | Magnetic stack design | Haiwen Xi, Antoine Khoueir, Pat J. Ryan, Michael Xuefei Tang, Insik Jin +1 more | 2011-05-10 |
| 7936583 | Variable resistive memory punchthrough access method | Maroun Georges Khoury, Hongyue Liu, Andrew John Carter | 2011-05-03 |
| 7936585 | Non-volatile memory cell with non-ohmic selection layer | Wei Tian, Insik Jin, Venugopalan Vaithyanathan, Haiwen Xi, Michael Xuefei Tang | 2011-05-03 |
| 7936592 | Non-volatile memory cell with precessional switching | Xiaobin Wang, Yong Lu, Haiwen Xi, Yuankai Zheng, Yiran Chen +3 more | 2011-05-03 |
| 7936622 | Defective bit scheme for multi-layer integrated memory device | Hai Li, Yiran Chen, Dadi Setiadi, Harry Hongyue Liu | 2011-05-03 |
| 7402364 | Semiconductor device with loop line pattern structure, method and alternating phase shift mask for fabricating the same | Chih-Yu Lee | 2008-07-22 |
| 7329916 | DRAM cell arrangement with vertical MOS transistors | Till Schlosser | 2008-02-12 |
| 7087947 | Semiconductor device with loop line pattern structure, method and alternating phase shift mask for fabricating the same | Chih-Yu Lee | 2006-08-08 |
| 6939763 | DRAM cell arrangement with vertical MOS transistors, and method for its fabrication | Till Schlosser | 2005-09-06 |
| 6828615 | Vertical internally-connected trench cell (V-ICTC) and formation method for semiconductor memory devices | John Walsh | 2004-12-07 |
| 6818515 | Method for fabricating semiconductor device with loop line pattern structure | Chih-Yu Lee | 2004-11-16 |