Issued Patents All Time
Showing 201–225 of 552 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10121877 | Vertical field effect transistor with metallic bottom region | Terence B. Hook, Joshua M. Rubin | 2018-11-06 |
| 10115629 | Air gap spacer formation for nano-scale semiconductor devices | Kangguo Cheng, Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta +2 more | 2018-10-30 |
| 10109533 | Nanosheet devices with CMOS epitaxy and method of forming | Ruilong Xie, Cheng Chi, Pietro Montanini, Nicolas Loubet | 2018-10-23 |
| 10109723 | Punch through stopper in bulk FinFET device | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-10-23 |
| 10103251 | Punch through stopper in bulk finFET device | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-10-16 |
| 10103247 | Vertical transistor having buried contact, and contacts using work function metals and silicides | Ruilong Xie, Hui Zang, Kangguo Cheng, Chun-Chen Yeh | 2018-10-16 |
| 10096674 | Stacked nanowire device width adjustment by gas cluster ion beam (GCIB) | Kangguo Cheng, Xin Miao, Ruilong Xie | 2018-10-09 |
| 10096692 | Vertical field effect transistor with reduced parasitic capacitance | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2018-10-09 |
| 10090410 | Forming a combination of long channel devices and vertical transport fin field effect transistors on the same substrate | Cheng Chi, Chen Zhang | 2018-10-02 |
| 10090165 | Method to improve finFET cut overlay | Effendi Leobandung | 2018-10-02 |
| 10084041 | Method and structure for improving FinFET with epitaxy source/drain | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2018-09-25 |
| 10084070 | Punch through stopper in bulk finFET device | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-09-25 |
| 10079249 | Finfet devices with multiple channel lengths | Effendi Leobandung | 2018-09-18 |
| 10079292 | Fabrication of vertical field effect transistor structure with controlled gate length | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2018-09-18 |
| 10068922 | FinFET devices with multiple channel lengths | Effendi Leobandung | 2018-09-04 |
| 10069015 | Width adjustment of stacked nanowires | Kangguo Cheng, Xin Miao, Ruilong Xie | 2018-09-04 |
| 10056408 | Structure and method to form a FinFET device | Andres Bryant, Jeffrey B. Johnson, Effendi Leobandung | 2018-08-21 |
| 10056378 | Silicon nitride fill for PC gap regions to increase cell density | Dechao Guo, Zuoguang Liu, Chun-Chen Yeh | 2018-08-21 |
| 10056334 | Dual metal-insulator-semiconductor contact structure and formulation method | Takashi Ando, Hiroaki Niimi | 2018-08-21 |
| 10050107 | Nanosheet transistors on bulk material | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2018-08-14 |
| 10038076 | Parasitic capacitance reducing contact structure in a finFET | Miaomiao Wang, Chun-Chen Yeh, Hui Zang | 2018-07-31 |
| 10037919 | Integrated single-gated vertical field effect transistor (VFET) and independent double-gated VFET | Ruilong Xie, Chun-Chen Yeh, Kangguo Cheng | 2018-07-31 |
| 10032677 | Method and structure to fabricate closely packed hybrid nanowires at scaled pitch | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-07-24 |
| 10032884 | Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling | Xiuyu Cai, Kangguo Cheng, Ali Khakifirooz, Ruilong Xie | 2018-07-24 |
| 10020381 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Su Chen Fan, Zuoguang Liu, Heng Wu | 2018-07-10 |