Issued Patents All Time
Showing 276–300 of 552 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9893171 | Fin field effect transistor fabrication and devices having inverted T-shaped gate | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-02-13 |
| 9892961 | Air gap spacer formation for nano-scale semiconductor devices | Kangguo Cheng, Thomas J. Haigh, Jr., Juntao Li, Eric G. Liniger, Sanjay C. Mehta +2 more | 2018-02-13 |
| 9882024 | Epitaxial and silicide layer formation at top and bottom surfaces of semiconductor fins | Kangguo Cheng, Zuoguang Liu, Ruilong Xie | 2018-01-30 |
| 9881925 | Mirror contact capacitor | Terence B. Hook, Joshua M. Rubin | 2018-01-30 |
| 9881919 | Well and punch through stopper formation using conformal doping | Effendi Leobandung | 2018-01-30 |
| 9871041 | Fabrication of vertical doped fins for complementary metal oxide semiconductor field effect transistors | Kangguo Cheng, Zuoguang Liu, Sanjay C. Mehta | 2018-01-16 |
| 9870958 | Forming CMOSFET structures with different contact liners | Kangguo Cheng, Zuoguang Liu | 2018-01-16 |
| 9870952 | Formation of VFET and finFET | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2018-01-16 |
| 9865703 | High-K layer chamfering to prevent oxygen ingress in replacement metal gate (RMG) process | Takashi Ando, Veeraraghavan S. Basker, Johnathan E. Faltermeier, Hemanth Jagannathan | 2018-01-09 |
| 9865508 | Method and structure to fabricate closely packed hybrid nanowires at scaled pitch | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2018-01-09 |
| 9859286 | Low-drive current FinFET structure for improving circuit density of ratioed logic in SRAM devices | Veeraraghavan S. Basker, Dechao Guo, Zuoguang Liu, Chun-Chen Yeh | 2018-01-02 |
| 9859281 | Dual FIN integration for electron and hole mobility enhancement | Chia-Yu Chen, Zuoguang Liu, Miaomiao Wang | 2018-01-02 |
| 9859280 | Selectively degrading current resistance of field effect transistor devices | Veeraraghavan S. Basker, Effendi Leobandung, Dieter Wendel | 2018-01-02 |
| 9859275 | Silicon nitride fill for PC gap regions to increase cell density | Dechao Guo, Zuoguang Liu, Chun-Chen Yeh | 2018-01-02 |
| 9853159 | Self aligned epitaxial based punch through control | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2017-12-26 |
| 9853158 | Method and structure for multigate FinFet device epi-extension junction control by hydrogen treatment | Veeraraghavan S. Basker, Zuoguang Liu, Chun-Chen Yeh | 2017-12-26 |
| 9853151 | Fully silicided linerless middle-of-line (MOL) contact | Joshua M. Rubin | 2017-12-26 |
| 9853117 | Spacer chamfering gate stack scheme | Hyun-Jin Cho, Hui Zang | 2017-12-26 |
| 9853115 | Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts | Hiroaki Niimi, Shariq Siddiqui | 2017-12-26 |
| 9837277 | Forming a contact for a tall fin transistor | Kangguo Cheng, Ruilong Xie | 2017-12-05 |
| 9831241 | Method and structure for improving finFET with epitaxy source/drain | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2017-11-28 |
| 9818823 | Stacked nanowire device width adjustment by gas cluster ion beam (GCIB) | Kangguo Cheng, Xin Miao, Ruilong Xie | 2017-11-14 |
| 9812443 | Forming vertical transistors and metal-insulator-metal capacitors on the same chip | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2017-11-07 |
| 9806153 | Controlling channel length for vertical FETs | Kangguo Cheng, Ruilong Xie, Chun-Chen Yeh | 2017-10-31 |
| 9806078 | FinFET spacer formation on gate sidewalls, between the channel and source/drain regions | Ruilong Xie, Christopher M. Prindle, Balasubramanian Pranatharthiharan, Pietro Montanini, Soon-Cheon Seo | 2017-10-31 |