Issued Patents All Time
Showing 51–75 of 115 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8816473 | Planar polysilicon regions for precision resistors and electrical fuses and method of fabrication | Arvind Kumar, Anthony I. Chou, Renee T. Mo | 2014-08-26 |
| 8809152 | Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for CMOS devices | MaryJane Brodsky, Murshed Chowdhury, Michael P. Chudzik, Min Dai, Siddarth A. Krishnan +1 more | 2014-08-19 |
| 8803243 | Complementary metal oxide semiconductor (CMOS) device having gate structures connected by a metal gate conductor | Yue Liang, Dureseti Chidambarrao, Brian J. Greene, William K. Henson, Unoh Kwon +1 more | 2014-08-12 |
| 8779551 | Gated diode structure for eliminating RIE damage from cap removal | Anthony I. Chou, Arvind Kumar, Edward P. Maciejewski, Dustin K. Slisher | 2014-07-15 |
| 8741725 | Butted SOI junction isolation structures and devices and method of fabrication | Jeffrey B. Johnson, Hasan M. Nayfeh, Viorel Ontalus, Robert R. Robison | 2014-06-03 |
| 8729637 | Work function adjustment by carbon implant in semiconductor devices including gate structure | Yue Liang, Dechao Guo, William K. Henson, Yanfeng Wang | 2014-05-20 |
| 8698128 | Gate-all around semiconductor nanowire FET's on bulk semicoductor wafers | Jeffrey W. Sleight, Josephine B. Chang, Isaac Lauer | 2014-04-15 |
| 8680617 | Split level shallow trench isolation for area efficient body contacts in SOI MOSFETS | Ying Li, Werner Rausch | 2014-03-25 |
| 8674342 | Pad-less gate-all around semiconductor nanowire FETs on bulk semiconductor wafers | Jeffrey W. Sleight, Josephine B. Chang, Isaac Lauer | 2014-03-18 |
| 8592295 | Gate-all around semiconductor nanowire FETs on bulk semiconductor wafers | Jeffrey W. Sleight, Josephine B. Chang, Isaac Lauer | 2013-11-26 |
| 8586966 | Contacts for nanowire field effect transistors | Sarunya Bangsaruntip, Guy M. Cohen, Jeffrey W. Sleight | 2013-11-19 |
| 8558313 | Bulk substrate FET integrated on CMOS SOI | Anthony I. Chou, Arvind Kumar, Ning Su, Huiling Shang | 2013-10-15 |
| 8541295 | Pad-less gate-all around semiconductor nanowire FETs on bulk semiconductor wafers | Jeffrey W. Sleight, Josephine B. Chang, Isaac Laurer | 2013-09-24 |
| 8536563 | Nanowire field effect transistors | Sarunya Bangsaruntip, Guy M. Cohen, Jeffrey W. Sleight | 2013-09-17 |
| 8513068 | Nanowire field effect transistors | Sarunya Bangsaruntip, Guy M. Cohen, Jeffrey W. Sleight | 2013-08-20 |
| 8490029 | Method of fabricating a device using low temperature anneal processes, a device and design structure | Anthony G. Domenicucci, Terence L. Kane, Karen A. Nummy, Viorel Ontalus, Yun-Yu Wang | 2013-07-16 |
| 8455334 | Planar and nanowire field effect transistors | Sarunya Bangsaruntip, Guy M. Cohen, Jeffrey W. Sleight | 2013-06-04 |
| 8343825 | Reducing dislocation formation in semiconductor devices through targeted carbon implantation | Anthony G. Domenicucci, Karen A. Nummy, Viorel Ontalus, Yun-Yu Wang | 2013-01-01 |
| 8343781 | Electrical mask inspection | Arvind Kumar, Anthony I. Chou | 2013-01-01 |
| 8302040 | Compact model methodology for PC landing pad lithographic rounding impact on device performance | Dureseti Chidambarrao, Gerald M. Davidson, Paul A. Hyde, Judith H. McCullen | 2012-10-30 |
| 8296691 | Methodology for improving device performance prediction from effects of active area corner rounding | Dureseti Chidambarrao, Gerald M. Davidson, Paul A. Hyde, Judith H. McCullen | 2012-10-23 |
| 8236709 | Method of fabricating a device using low temperature anneal processes, a device and design structure | Anthony G. Domenicucci, Terence L. Kane, Karen A. Nummy, Viorel Ontalus, Yun-Yu Wang | 2012-08-07 |
| 8232603 | Gated diode structure and method including relaxed liner | Anthony I. Chou, Gregory G. Freeman, Kevin McStay | 2012-07-31 |
| 8232599 | Bulk substrate FET integrated on CMOS SOI | Anthony I. Chou, Arvind Kumar, Ning Su, Huiling Shang | 2012-07-31 |
| 8097515 | Self-aligned contacts for nanowire field effect transistors | Sarunya Bangsaruntip, Guy M. Cohen, Jeffrey W. Sleight | 2012-01-17 |