PH

Paul A. Hyde

IBM: 11 patents #9,995 of 70,183Top 15%
Overall (All Time): #465,577 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8539426 Method and system for extracting compact models for circuit simulation Rainer Thoma, Josef S. Watts 2013-09-17
8412487 Self heating monitor for SiGe and SOI CMOS devices Edward J. Nowak 2013-04-02
8392867 System, method and program storage device for developing condensed netlists representative of groups of active devices in an integrated circuit and for modeling the performance of the integrated circuit based on the condensed netlists Yanqing Deng, James M. Johnson, Todd G. McKenzie, Scott K. Springer, Richard Q. Williams 2013-03-05
8302040 Compact model methodology for PC landing pad lithographic rounding impact on device performance Dureseti Chidambarrao, Gerald M. Davidson, Judith H. McCullen, Shreesh Narasimha 2012-10-30
8296691 Methodology for improving device performance prediction from effects of active area corner rounding Dureseti Chidambarrao, Gerald M. Davidson, Judith H. McCullen, Shreesh Narasimha 2012-10-23
7979815 Compact model methodology for PC landing pad lithographic rounding impact on device performance Dureseti Chidambarrao, Gerald M. Davidson, Judith H. McCullen, Shreesh Narasimha 2011-07-12
7862233 Self heating monitor for SiGe and SOI CMOS devices Edward J. Nowak 2011-01-04
7805274 Structure and methodology for characterizing device self-heating Ping-Chuan Wang, Kevin Kolvenbach, Giuseppe La Rosa 2010-09-28
7406397 Self heating monitor for SiGe and SOI CMOS devices Edward J. Nowak 2008-07-29
7101745 Method of forming ladder-type gate structure for four-terminal SOI semiconductor device 2006-09-05
6861716 Ladder-type gate structure for four-terminal SOI semiconductor device 2005-03-01