Issued Patents All Time
Showing 25 most recent of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10796973 | Test structures connected with the lowest metallization levels in an interconnect structure | Mankyu Yang, Vara Govindeswara Reddy Vakada, Brian J. Greene, Atsushi Ogino, Vikrant Chauhan +1 more | 2020-10-06 |
| 10790204 | Test structure leveraging the lowest metallization level of an interconnect structure | Mankyu Yang, Vara Govindeswara Reddy Vakada, Brian J. Greene, Atsushi Ogino, Vikrant Chauhan +1 more | 2020-09-29 |
| 9595518 | Fin-type metal-semiconductor resistors and fabrication methods thereof | Anthony I. Chou, Chengwen Pei, Ning Zhan | 2017-03-14 |
| 9437496 | Merged source drain epitaxy | Michael P. Chudzik, Brian J. Greene, Kevin McStay, Shreesh Narasimha, Chengwen Pei +1 more | 2016-09-06 |
| 9431339 | Wiring structure for trench fuse component with methods of fabrication | Toshiaki Kirihata, Subramanian S. Iyer, Chengwen Pei, Deepal Wehella-Gamage | 2016-08-30 |
| 9431340 | Wiring structure for trench fuse component with methods of fabrication | Toshiaki Kirihata, Subramanian S. Iyer, Chengwen Pei, Deepal Wehella-Gamage | 2016-08-30 |
| 9209200 | Methods for forming a self-aligned maskless junction butting for integrated circuits | Chengwen Pei, Gan Wang, Geng Wang | 2015-12-08 |
| 9064972 | Method of forming a gated diode structure for eliminating RIE damage from cap removal | Anthony I. Chou, Arvind Kumar, Shreesh Narasimha, Dustin K. Slisher | 2015-06-23 |
| 8980720 | eFUSE and method of fabrication | Dustin K. Slisher, Stefan Zollner | 2015-03-17 |
| 8912626 | eFuse and method of fabrication | Dustin K. Slisher, Stefan Zollner | 2014-12-16 |
| 8796771 | Creating anisotropically diffused junctions in field effect transistor devices | Brian J. Greene, Jeffrey B. Johnson, Qingqing Liang | 2014-08-05 |
| 8779551 | Gated diode structure for eliminating RIE damage from cap removal | Anthony I. Chou, Arvind Kumar, Shreesh Narasimha, Dustin K. Slisher | 2014-07-15 |
| 8633096 | Creating anisotropically diffused junctions in field effect transistor devices | Brian J. Greene, Jeffrey B. Johnson, Qingqing Liang | 2014-01-21 |
| 8513085 | Structure and method to improve threshold voltage of MOSFETs including a high k dielectric | Sunfei Fang, Brian J. Greene, Effendi Leobandung, Qingqing Liang, Yanfeng Wang | 2013-08-20 |
| 8456169 | High speed measurement of random variation/yield in integrated circuit device testing | Manjul Bhushan, Mark B. Ketchen, Qingqing Liang | 2013-06-04 |
| 8354309 | Method of providing threshold voltage adjustment through gate dielectric stack modification | Brian J. Greene, Michael P. Chudzik, Shu-Jen Han, William K. Henson, Yue Liang +3 more | 2013-01-15 |
| 8173531 | Structure and method to improve threshold voltage of MOSFETS including a high K dielectric | Sunfei Fang, Brian J. Greene, Effendi Leobandung, Qingqing Liang, Yanfeng Wang | 2012-05-08 |
| 8106455 | Threshold voltage adjustment through gate dielectric stack modification | Brian J. Greene, Michael P. Chudzik, Shu-Jen Han, William K. Henson, Yue Liang +3 more | 2012-01-31 |
| 7583125 | Methods and apparatus for pulse generation used in characterizing electronic fuses | Manjul Bhushan, Mark B. Ketchen, Chandrasekharan Kothandaraman | 2009-09-01 |
| 7504875 | Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit | Manjul Bhushan, Mark B. Ketchen, Chandrasekharan Kothandaraman | 2009-03-17 |
| 7408421 | Determining thermal absorption using ring oscillator | Ishtiaq Ahsan, Noah Zamdmer | 2008-08-05 |
| 7396694 | Structure for monitoring semiconductor polysilicon gate profile | Ishtiaq Ahsan | 2008-07-08 |
| 7354805 | Method of making electrically programmable fuse for silicon-on-insulator (SOI) technology | Chandrasekharan Kothandaraman | 2008-04-08 |
| 7295057 | Methods and apparatus for characterizing electronic fuses used to personalize an integrated circuit | Manjul Bhushan, Mark B. Ketchen, Chandrasekharan Kothandaraman | 2007-11-13 |
| 7242072 | Electrically programmable fuse for silicon-on-insulator (SOI) technology | Chandrasekharan Kothandaraman | 2007-07-10 |