Issued Patents All Time
Showing 76–100 of 146 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10128347 | Gate-all-around field effect transistor having multiple threshold voltages | Ruqiang Bao, Michael A. Guillorn, Terence B. Hook, Reinaldo Vega, Tenko Yamashita | 2018-11-13 |
| 10096607 | Three-dimensional stacked junctionless channels for dense SRAM | Michael A. Guillorn, Reinaldo Vega, Rajasekhar Venigalla | 2018-10-09 |
| 10056382 | Modulating transistor performance | Dechao Guo, Juntao Li, Sanjay C. Mehta, Huimei Zhou | 2018-08-21 |
| 10037895 | Structures, methods and applications for electrical pulse anneal processes | Michel J. Abou-Khalil, Robert J. Gauthier, Jr., Tom C. Lee, Junjun Li, Souvick Mitra +1 more | 2018-07-31 |
| 10032885 | Channel replacement and bimodal doping scheme for bulk finFet threshold voltage modulation with reduced performance penalty | Gauri Karve, Reinaldo Vega | 2018-07-24 |
| 9972550 | Source/drain epitaxial electrical monitor | Edward J. Nowak, Lyndon R. Logan | 2018-05-15 |
| 9941179 | Capacitive measurements of divots in semiconductor devices | Lyndon R. Logan, Edward J. Nowak, Yan He | 2018-04-10 |
| 9935106 | Multi-finger devices in mutliple-gate-contacted-pitch, integrated structures | Edward J. Nowak, Brent A. Anderson | 2018-04-03 |
| 9917196 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Eric R. Miller, John R. Sporre +1 more | 2018-03-13 |
| 9911804 | Vertical fin field effect transistor with air gap spacers | Hari V. Mallela, Reinaldo Vega, Rajasekhar Venigalla | 2018-03-06 |
| 9881810 | Structures, methods and applications for electrical pulse anneal processes | Michel J. Abou-Khalil, Robert J. Gauthier, Jr., Tom C. Lee, Junjun Li, Souvick Mitra +1 more | 2018-01-30 |
| 9859384 | Vertical field effect transistors with metallic source/drain regions | Hari V. Mallela, Reinaldo Vega, Rajasekhar Venigalla | 2018-01-02 |
| 9859421 | Vertical field effect transistor with subway etch replacement metal gate | Reinaldo Vega, Rajasekhar Venigalla | 2018-01-02 |
| 9852956 | Extraction of resistance associated with laterally diffused dopant profiles in CMOS devices | Lyndon R. Logan, Edward J. Nowak, Jonathan K. Winslow, II | 2017-12-26 |
| 9847416 | Performance-enhanced vertical device and method of forming thereof | Edward J. Nowak, Brent A. Anderson | 2017-12-19 |
| 9805990 | FDSOI voltage reference | Andres Bryant, Edward J. Nowak | 2017-10-31 |
| 9735275 | Channel replacement and bimodal doping scheme for bulk finFET threshold voltage modulation with reduced performance penalty | Gauri Karve, Reinaldo Vega | 2017-08-15 |
| 9728466 | Vertical field effect transistors with metallic source/drain regions | Hari V. Mallela, Reinaldo Vega, Rajasekhar Venigalla | 2017-08-08 |
| 9536882 | Field-isolated bulk FinFET | Brent A. Anderson, Edward J. Nowak, Andreas Scholze | 2017-01-03 |
| 9530798 | High performance heat shields with reduced capacitance | Anthony I. Chou, Sungjae Lee, Joseph M. Lukaitis | 2016-12-27 |
| 9466693 | Self aligned replacement metal source/drain finFET | Emre Alptekin, Reinaldo Vega | 2016-10-11 |
| 9349749 | Semiconductor device including SIU butted junction to reduce short-channel penalty | Viorel Ontalus, Xin-Yong WANG | 2016-05-24 |
| 9337088 | MOL resistor with metal grid heat shield | William F. Clark, Jr., Hung H. Tran | 2016-05-10 |
| 9318622 | Fin-type PIN diode array | Lyndon R. Logan, Edward J. Nowak | 2016-04-19 |
| 9263517 | Extremely thin semiconductor-on-insulator (ETSOI) layer | Wagdi W. Abadeer, Kiran V. Chatty, Jason E. Cummings, Toshiharu Furukawa, Robert J. Gauthier, Jr. +2 more | 2016-02-16 |