Issued Patents All Time
Showing 26–50 of 209 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12317555 | Gate-all-around nanosheet field effect transistor integrated with fin field effect transistor | Sagarika Mukesh, Ruqiang Bao, Andrew M. Greene, Jingyun Zhang, Nicolas Loubet +1 more | 2025-05-27 |
| 12317514 | Resistive random-access memory structures with stacked transistors | Min Gyu Sung, Kangguo Cheng, Ruilong Xie, Chanro Park, Soon-Cheon Seo | 2025-05-27 |
| 12317509 | Stacked spin-orbit-torque magnetoresistive random-access memory | Kangguo Cheng, Dimitri Houssameddine, Ruilong Xie | 2025-05-27 |
| 12310061 | Nanosheet transistor devices with different active channel widths | Ruilong Xie, Kangguo Cheng, Chanro Park, Cheng Chi, Jinning Liu | 2025-05-20 |
| 12310064 | Isolation pillar structures for stacked device structures | Ruilong Xie, Kangguo Cheng, Chanro Park, Min Gyu Sung | 2025-05-20 |
| 12310054 | Late replacement bottom isolation for nanosheet devices | Ruilong Xie, Andrew M. Greene, Veeraraghavan S. Basker | 2025-05-20 |
| 12300617 | Self-aligned buried power rail cap for semiconductor devices | Ruilong Xie, Huimei Zhou, Kisik Choi | 2025-05-13 |
| 12278237 | Stacked FETS with non-shared work function metals | Ruilong Xie, Junli Wang, Dechao Guo, Ruqiang Bao, Rishikesh Krishnan +1 more | 2025-04-15 |
| 12274089 | Stacked FET sidewall strap connections between gates | Chen Zhang, Ruilong Xie, Heng Wu | 2025-04-08 |
| 12274186 | Low current phase-change memory device | Juntao Li, Kangguo Cheng, Ruilong Xie | 2025-04-08 |
| 12272648 | Semiconductor device having a backside power rail | Ruilong Xie, Junli Wang, Dechao Guo, Lawrence A. Clevenger | 2025-04-08 |
| 12255651 | Reconfigurable ring oscillator (RO) physical unclonable function (PUF) | Kangguo Cheng, Carl Radens, Ruilong Xie | 2025-03-18 |
| 12256554 | Embedded MRAM integrated with super via and dummy fill | Ruilong Xie, Kangguo Cheng, Dimitri Houssameddine | 2025-03-18 |
| 12249643 | Stacked planar field effect transistors with 2D material channels | Andrew Gaul, Ruilong Xie, Andrew M. Greene, Christopher J. Waskiewicz | 2025-03-11 |
| 12245517 | MRAM stack with reduced height | Ruilong Xie, Dimitri Houssameddine, Kangguo Cheng, Bruce B. Doris | 2025-03-04 |
| 12224312 | Field effect transistors with bottom dielectric isolation | Ruilong Xie, Andrew M. Greene, Veeraraghavan S. Basker | 2025-02-11 |
| 12211848 | Field effect transistors comprising a matrix of gate-all-around channels | Ruilong Xie, Kangguo Cheng, Chanro Park | 2025-01-28 |
| 12183740 | Stacked field-effect transistors | Ruilong Xie, Kangguo Cheng, Curtis S. Durfee, Jay William Strane, Min Gyu Sung +1 more | 2024-12-31 |
| 12176345 | Stacked FET with independent gate control | Ruilong Xie, Kangguo Cheng, Juntao Li, Chanro Park | 2024-12-24 |
| 12154985 | Moon-shaped bottom spacer for vertical transport field effect transistor (VTFET) devices | Ruilong Xie, Chen Zhang, Alexander Reznicek, Shogo Mochizuki | 2024-11-26 |
| 12154945 | Backside CMOS trench epi with close N2P space | Tao Li, Ruilong Xie, Nicolas Loubet | 2024-11-26 |
| 12154971 | Forming nanosheet transistor using sacrificial spacer and inner spacers | Kangguo Cheng, Nicolas Loubet | 2024-11-26 |
| 12150310 | Ferroelectric random-access memory cell | Kangguo Cheng, Ruilong Xie, Chanro Park, Min Gyu Sung | 2024-11-19 |
| 12142526 | Stacked device with buried interconnect | Ruilong Xie, Chen Zhang, Heng Wu, Alexander Reznicek | 2024-11-12 |
| 12136655 | Backside electrical contacts to buried power rails | Ruilong Xie, Brent A. Anderson, Albert M. Young, Kangguo Cheng, Balasubramanian Pranatharthiharan +2 more | 2024-11-05 |