Issued Patents All Time
Showing 51–75 of 213 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10707132 | Method to recess cobalt for gate metal application | Georges Jacobi, Vimal Kamineni, Randolph F. Knarr, Muthumanickam Sankarapandian | 2020-07-07 |
| 10699951 | Self-aligned low dielectric constant gate cap and a method of forming the same | Injo Ok, Charan V. V. S. Surisetty | 2020-06-30 |
| 10665512 | Stress modulation of nFET and pFET fin structures | Huimei Zhou, Kangguo Cheng, Michael P. Belyansky, Oleg Gluschenkov, Richard A. Conti +1 more | 2020-05-26 |
| 10643894 | Surface area and Schottky barrier height engineering for contact trench epitaxy | Jody A. Fronheiser, Shogo Mochizuki, Hiroaki Niimi, Mark V. Raymond, Tenko Yamashita | 2020-05-05 |
| 10643893 | Surface area and Schottky barrier height engineering for contact trench epitaxy | Jody A. Fronheiser, Shogo Mochizuki, Hiroaki Niimi, Mark V. Raymond, Tenko Yamashita | 2020-05-05 |
| 10629721 | Contact resistance reduction for advanced technology nodes | Injo Ok, Charan V. Surisetty | 2020-04-21 |
| 10629702 | Approach to bottom dielectric isolation for vertical transport fin field effect transistors | Zhenxing Bi, Thamarai S. Devarajan, Sanjay C. Mehta, Muthumanickam Sankarapandian | 2020-04-21 |
| 10622458 | Self-aligned contact for vertical field effect transistor | Brent A. Anderson, Steven R. Bentley, Su Chen Fan, Junli Wang, Ruilong Xie | 2020-04-14 |
| 10622352 | Fin cut to prevent replacement gate collapse on STI | Andrew M. Greene, Sivananda K. Kanakasabapathy, John R. Sporre | 2020-04-14 |
| 10622259 | Semiconductor devices with sidewall spacers of equal thickness | Kangguo Cheng, Soon-Cheon Seo | 2020-04-14 |
| 10615257 | Patterning method for nanosheet transistors | Injo Ok, Wei Wang, Kevin W. Brew | 2020-04-07 |
| 10615078 | Method to recess cobalt for gate metal application | Georges Jacobi, Vimal Kamineni, Randolph F. Knarr, Muthumanickam Sankarapandian | 2020-04-07 |
| 10580704 | Semiconductor devices with sidewall spacers of equal thickness | Kangguo Cheng, Soon-Cheon Seo | 2020-03-03 |
| 10559654 | Nanosheet isolation for bulk CMOS non-planar devices | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2020-02-11 |
| 10546785 | Method to recess cobalt for gate metal application | Georges Jacobi, Vimal Kamineni, Randolph F. Knarr, Muthumanickam Sankarapandian | 2020-01-28 |
| 10541253 | FinFETs with various fin height | Kangguo Cheng, Terence B. Hook, Xin Miao | 2020-01-21 |
| 10505111 | Confined phase change memory with double air gap | Injo Ok, Wei Wang | 2019-12-10 |
| 10490454 | Minimize middle-of-line contact line shorts | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2019-11-26 |
| 10431663 | Method of forming integrated circuit with gate-all-around field effect transistor and the resulting structure | Ruilong Xie, Pietro Montanini, Julien Frougier | 2019-10-01 |
| 10396200 | Method and structure of improving contact resistance for passive and long channel devices | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2019-08-27 |
| 10395995 | Dual liner silicide | Ruilong Xie, Chun-Chen Yeh | 2019-08-27 |
| 10388571 | Fin type field effect transistors with different pitches and substantially uniform fin reveal | Zhenxing Bi, Kangguo Cheng, Thamarai S. Devarajan | 2019-08-20 |
| 10373874 | Middle of the line subtractive self-aligned contacts | Joshua M. Rubin | 2019-08-06 |
| 10361203 | FET trench dipole formation | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2019-07-23 |
| 10355080 | Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2019-07-16 |