Issued Patents All Time
Showing 26–50 of 213 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11038055 | Method and structure of improving contact resistance for passive and long channel devices | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2021-06-15 |
| 11011429 | Minimize middle-of-line contact line shorts | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2021-05-18 |
| 11004750 | Middle of the line contact formation | Ruilong Xie, Chanro Park, Nicolas Loubet | 2021-05-11 |
| 10998234 | Nanosheet bottom isolation and source or drain epitaxial growth | Ruilong Xie, Veeraraghavan S. Basker, Nicolas Loubet | 2021-05-04 |
| 10985260 | Trench silicide contacts with high selectivity process | Andrew M. Greene, Ruilong Xie | 2021-04-20 |
| 10978343 | Interconnect structure having fully aligned vias | Chanro Park, Nicholas Anthony Lanzillo, Christopher J. Penny, Lawrence A. Clevenger | 2021-04-13 |
| 10937861 | Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack | Injo Ok, Soon-Cheon Seo, Charan V. V. S. Surisetty | 2021-03-02 |
| 10937961 | Structure and method to form bi-layer composite phase-change-memory cell | Injo Ok, Myung-Hee Na, Nicole Saulnier | 2021-03-02 |
| 10923471 | Minimizing shorting between FinFET epitaxial regions | Kangguo Cheng, Alexander Reznicek, Charan V. V. S. Surisetty | 2021-02-16 |
| 10916478 | Methods of performing fin cut etch processes for FinFET semiconductor devices | Lei Zhuang, Lars Liebmann, Ruilong Xie, Terence B. Hook | 2021-02-09 |
| 10896972 | Self-aligned contact for vertical field effect transistor | Brent A. Anderson, Steven R. Bentley, Su Chen Fan, Junli Wang, Ruilong Xie | 2021-01-19 |
| 10840354 | Approach to bottom dielectric isolation for vertical transport fin field effect transistors | Zhenxing Bi, Thamarai S. Devarajan, Sanjay C. Mehta, Muthumanickam Sankarapandian | 2020-11-17 |
| 10833269 | 3D phase change memory | Wei Wang, Injo Ok, Kevin W. Brew | 2020-11-10 |
| 10832964 | Replacement contact formation for gate contact over active region with selective metal growth | Ruilong Xie, Chanro Park, Nicolas Loubet | 2020-11-10 |
| 10832973 | Stress modulation of nFET and pFET fin structures | Huimei Zhou, Kangguo Cheng, Michael P. Belyansky, Oleg Gluschenkov, Richard A. Conti +1 more | 2020-11-10 |
| 10833267 | Structure and method to form phase change memory cell with self- align top electrode contact | Injo Ok, Myung-Hee Na, Nicole Saulnier | 2020-11-10 |
| 10818773 | Trench silicide contacts with high selectivity process | Andrew M. Greene, Ruilong Xie | 2020-10-27 |
| 10803933 | Self-aligned high density and size adjustable phase change memory | Injo Ok, Myung-Hee Na, Nicole Saulnier | 2020-10-13 |
| 10804159 | Minimize middle-of-line contact line shorts | Injo Ok, Soon-Cheon Seo, Charan V. Surisetty | 2020-10-13 |
| 10797154 | Trench silicide contacts with high selectivity process | Andrew M. Greene, Ruilong Xie | 2020-10-06 |
| 10790284 | Spacer for trench epitaxial structures | Injo Ok, Soon-Cheon Seo, Charan V. V. S. Surisetty | 2020-09-29 |
| 10763326 | Middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack | Injo Ok, Soon-Cheon Seo, Charan V. V. S. Surisetty | 2020-09-01 |
| 10741559 | Spacer for trench epitaxial structures | Injo Ok, Soon-Cheon Seo, Charan V. V. S. Surisetty | 2020-08-11 |
| 10741449 | Stacked transistors with different channel widths | Kangguo Cheng, Lawrence A. Clevenger, John H. Zhang | 2020-08-11 |
| 10714393 | Middle of the line subtractive self-aligned contacts | Joshua M. Rubin | 2020-07-14 |