Issued Patents All Time
Showing 1–25 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406862 | Vacuum processing apparatus and oxidizing gas removal method | Hirokazu Ueda, Yoji IIZUKA, Mitsuaki Iwashita, Dipak Aryal, Takeo Nakano +5 more | 2025-09-02 |
| 12226796 | Bath systems and methods thereof | Michael A. Carcasi, Ihsan Simms, Joel Estrella, Joshua Hooge, Hiroshi Marumoto | 2025-02-18 |
| 12002687 | System and methods for wafer drying | Trace Hurd, Derek Bassett, Hitoshi Kosugi | 2024-06-04 |
| 11738363 | Bath systems and methods thereof | Michael A. Carcasi, Ihsan Simms, Joel Estrella, Joshua Hooge, Hiroshi Marumoto | 2023-08-29 |
| 11515178 | System and methods for wafer drying | Trace Hurd, Derek Bassett, Hitoshi Kosugi | 2022-11-29 |
| 11376640 | Apparatus and method to electrostatically remove foreign matter from substrate surfaces | Derek Bassett, Trace Hurd, Ihsan Simms | 2022-07-05 |
| 10916440 | Process and apparatus for processing a nitride structure without silica deposition | Derek Bassett, Wallace P. Printz, Teruomi Minami, Takahiro Furukawa | 2021-02-09 |
| 10886290 | Etching of silicon nitride and silica deposition control in 3D NAND structures | Derek Bassett, Ihsan Simms, Trace Hurd | 2021-01-05 |
| 10515820 | Process and apparatus for processing a nitride structure without silica deposition | Derek Bassett, Wallace P. Printz, Teruomi Minami, Takahiro Furukawa | 2019-12-24 |
| 10256163 | Method of treating a microelectronic substrate using dilute TMAH | Wallace P. Printz, Shuhei Takahashi, Naoyuki Okamura, Masami Yamashita, Derek Bassett | 2019-04-09 |
| 10096480 | Method and apparatus for dynamic control of the temperature of a wet etch process | Wallace P. Printz | 2018-10-09 |
| 8703555 | Defect prevention on SRAM cells that incorporate selective epitaxial regions | — | 2014-04-22 |
| 8384138 | Defect prevention on SRAM cells that incorporate selective epitaxial regions | — | 2013-02-26 |
| 7691714 | Semiconductor device having a dislocation loop located within a boundary created by source/drain regions and a method of manufacture therefor | Kaiping Liu, Jihong Chen, Amitabh Jain | 2010-04-06 |
| 7601577 | Work function control of metals | James Joseph Chambers, Mark Visokay, Luigi Colombo | 2009-10-13 |
| 7601578 | Defect control in gate dielectrics | Luigi Colombo, James Joseph Chambers, Mark Visokay | 2009-10-13 |
| 7528072 | Crystallographic preferential etch to define a recessed-region for epitaxial growth | Trace Hurd, Elisabeth Marley Koontz | 2009-05-05 |
| 7514309 | Methods to selectively protect NMOS regions, PMOS regions, and gate layers during EPI process | Seetharaman Sridhar, Craig Hall, Che-Jen Hu | 2009-04-07 |
| 7432566 | Method and system for forming dual work function gate electrodes in a semiconductor device | Mark Visokay | 2008-10-07 |
| 7422969 | Multi-step process for patterning a metal gate electrode | Deborah J. Riley, Trace Hurd | 2008-09-09 |
| 7351626 | Method for controlling defects in gate dielectrics | Luigi Colombo, James Joseph Chambers, Mark Visokay | 2008-04-01 |
| 7323403 | Multi-step process for patterning a metal gate electrode | Deborah J. Riley, Trace Hurd | 2008-01-29 |
| 7233035 | Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound | Mark Visokay, Luigi Colombo | 2007-06-19 |
| 7226826 | Semiconductor device having multiple work functions and method of manufacture therefor | Husam N. Alshareef, Mark Visokay, Luigi Colombo | 2007-06-05 |
| 7199011 | Method to reduce transistor gate to source/drain overlap capacitance by incorporation of carbon | Majid Mansoori, Alwin Tsao, Brian Smith | 2007-04-03 |