Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7172936 | Method to selectively strain NMOS devices using a cap poly layer | Seetharaman Sridhar | 2007-02-06 |
| 7169659 | Method to selectively recess ETCH regions on a wafer surface using capoly as a mask | Seetharaman Sridhar | 2007-01-30 |
| 7135361 | Method for fabricating transistor gate structures and gate dielectrics thereof | Mark Visokay, Luigi Colombo, James Joseph Chambers, Haowen Bu | 2006-11-14 |
| 7109077 | Dual work function gate electrodes using doped polysilicon and a metal silicon germanium compound | Mark Visokay, Luigi Colombo | 2006-09-19 |
| 7088123 | System and method for extraction of C-V characteristics of ultra-thin oxides | Jau-Yuann Yang, Hamseswari Renganathan, Kaiping Liu | 2006-08-08 |
| 7071519 | Control of high-k gate dielectric film composition profile for property optimization | Luigi Colombo, Mark Visokay, James Joseph Chambers | 2006-07-04 |
| 7033897 | Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology | Yuanning Chen, Karen Kirmse | 2006-04-25 |
| 7026218 | Use of indium to define work function of p-type doped polysilicon | James Joseph Chambers, Amitabh Jain | 2006-04-11 |
| 6979623 | Method for fabricating split gate transistor device having high-k dielectrics | Mark Visokay, James Joseph Chambers, Luigi Colombo | 2005-12-27 |
| 6939816 | Method to improve the uniformity and reduce the surface roughness of the silicon dielectric interface | — | 2005-09-06 |
| 6858908 | Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide | Mark Visokay | 2005-02-22 |
| 6852645 | High temperature interface layer growth for high-k gate dielectric | Luigi Colombo, James Joseph Chambers, Mark Visokay | 2005-02-08 |
| 6835639 | Multiple work function gates | Mark Visokay | 2004-12-28 |
| 6821873 | Anneal sequence for high-&kgr; film property optimization | Mark Visokay, Luigi Colombo | 2004-11-23 |
| 6809370 | High-k gate dielectric with uniform nitrogen profile and methods for making the same | Luigi Colombo, Manuel Quevedo-Lopez, James Joseph Chambers, Mark Visokay | 2004-10-26 |
| 6803611 | Use of indium to define work function of p-type doped polysilicon | James Joseph Chambers, Amitabh Jain | 2004-10-12 |
| 6794252 | Method and system for forming dual work function gate electrodes in a semiconductor device | Mark Visokay | 2004-09-21 |
| 6787425 | Methods for fabricating transistor gate structures | Trace Hurd, Stephanie W. Butler, Majid Mansoori | 2004-09-07 |
| 6780719 | Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures | Hiroaki Niimi, Rajesh Khamankar, James Joseph Chambers, Sunil Hattangady | 2004-08-24 |
| 6770521 | Method of making multiple work function gates by implanting metals with metallic alloying additives | Mark Visokay, Luigi Colombo | 2004-08-03 |
| 6750126 | Methods for sputter deposition of high-k dielectric films | Mark Visokay, James Joseph Chambers, Luigi Colombo | 2004-06-15 |
| 6727185 | Dry process for post oxide etch residue removal | Patricia B. Smith, David B. Aldrich, Eric C. Williams | 2004-04-27 |
| 6696332 | Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing | Mark Visokay, Luigi Colombo | 2004-02-24 |
| 6656852 | Method for the selective removal of high-k dielectrics | James Joseph Chambers | 2003-12-02 |
| 6642094 | Complementary transistors having respective gates formed from a metal and a corresponding metal-silicide | Mark Visokay | 2003-11-04 |