RK

Rajesh Khamankar

TI Texas Instruments: 43 patents #191 of 12,488Top 2%
Overall (All Time): #70,988 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 25 most recent of 43 patents

Patent #TitleCo-InventorsDate
8809141 High performance CMOS transistors using PMD liner stress Haowen Bu, Douglas T. Grider 2014-08-19
8471307 In-situ carbon doped e-SiGeCB stack for MOS transistor Haowen Bu, Douglas T. Grider 2013-06-25
8114784 Laminated stress overlayer using In-situ multiple plasma treatments for transistor improvement Haowen Bu, Che-Jen Hu 2012-02-14
8084312 Nitrogen based implants for defect reduction in strained silicon Srinivasan Chakravarthi, P R Chidambaram, Haowen Bu, Douglas T. Grider 2011-12-27
8084787 PMD liner nitride films and fabrication methods for improved NMOS performance Haowen Bu, Douglas T. Grider 2011-12-27
8021990 Gate structure and method Antonio Rotondaro, Luigi Colombo, Mark Visokay, Douglas E. Mercer 2011-09-20
7847401 Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps P R Chidambaram, Haowen Bu, Douglas T. Grider 2010-12-07
7682988 Thermal treatment of nitrided oxide to improve negative bias thermal instability Husam N. Alshareef, Ajith Varghese, Cathy Chancellor, Anand Krishnan, Malcolm J. Bevan 2010-03-23
7670892 Nitrogen based implants for defect reduction in strained silicon Srinivasan Chakravarthi, PR Chidambaram, Haowen Bu, Douglas T. Grider 2010-03-02
7601575 Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance Haowen Bu, Shashank S. Ekbote, Shaoping Tang, Freidoon Mehrad 2009-10-13
7560792 Reliable high voltage gate dielectric layers using a dual nitridation process Douglas T. Grider, Hiroaki Niimi, April Gurba, Toan Tran, James Joseph Chambers 2009-07-14
7553718 Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps Periannan Chidambaram, Haowen Bu, Douglas T. Grider 2009-06-30
7535066 Gate structure and method Antonio Rotondaro, Luigi Colombo, Mark Visokay, Douglas E. Mercer 2009-05-19
7514308 CMOS device having different amounts of nitrogen in the NMOS gate dielectric layers and PMOS gate dielectric layers Ajith Varghese, Husam N. Alshareef 2009-04-07
7402524 Post high voltage gate oxide pattern high-vacuum outgas surface treatment Brian K. Kirkpatrick, Malcolm J. Bevan, April Gurba, Husam N. Alshareef, Clinton L. Montgomery +1 more 2008-07-22
7345001 Gate dielectric having a flat nitrogen profile and method of manufacture therefor Hiroaki Niimi, Husam N. Alshareef, Toan Tran 2008-03-18
7339240 Dual-gate integrated circuit semiconductor device Brian K. Kirkpatrick, Malcolm J. Bevan, April Gurba, Husam N. Alshareef, Clinton L. Montgomery +1 more 2008-03-04
7227201 CMOS device having different amounts of nitrogen in the NMOS gate dielectric layers and PMOS gate dielectric layers Ajith Varghese, Husam N. Alshareef 2007-06-05
7226834 PMD liner nitride films and fabrication methods for improved NMOS performance Haowen Bu, Douglas T. Grider 2007-06-05
7217626 Transistor fabrication methods using dual sidewall spacers Haowen Bu, PR Chidambaram, Lindsey Hall 2007-05-15
7192894 High performance CMOS transistors using PMD liner stress Haowen Bu, Douglas T. Grider 2007-03-20
7183165 Reliable high voltage gate dielectric layers using a dual nitridation process Douglas T. Grider, Hiroaki Niimi, April Gurba, Toan Tran, James Joseph Chambers 2007-02-27
7129127 Integration scheme to improve NMOS with poly cap while mitigating PMOS degradation Periannan Chidambaram, Srinivasan Chakravarthi, Haowen Bu 2006-10-31
7049242 Post high voltage gate dielectric pattern plasma surface treatment Brian K. Kirkpatrick, Malcolm J. Bevan, April Gurba, Husam N. Alshareef, Clinton L. Montgomery +1 more 2006-05-23
7018925 Post high voltage gate oxide pattern high-vacuum outgas surface treatment Brian K. Kirkpatrick, Malcolm J. Bevan, April Gurba, Husam N. Alshareef, Clinton L. Montgomery +1 more 2006-03-28