Issued Patents All Time
Showing 25 most recent of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9252050 | Method to improve semiconductor surfaces and polishing | Michael Hatzistergos, Ahmet S. Ozcan, Filippos Papadatos, Yiyi Wang | 2016-02-02 |
| 9230857 | Method to improve semiconductor surfaces and polishing | Michael Hatzistergos, Ahmet S. Ozcan, Filippos Papadatos, Yiyi Wang | 2016-01-05 |
| 8944105 | Capacitive sensing apparatus and method for faucets | Robert W. Rodenbeck, David M. Burke, Timothy J. Ensor, Paul D. Koottungal | 2015-02-03 |
| 8940634 | Overlapping contacts for semiconductor device | Brett H. Engel, David F. Hilscher, Randolph F. Knarr, Steven R. Soss, Jin Z. Wallner | 2015-01-27 |
| 8119470 | Mitigation of gate to contact capacitance in CMOS flow | Shashank S. Ekbote, Borna J. Obradovic, Craig Huffman, Ajith Varghese | 2012-02-21 |
| 8053252 | Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean | Kezhakkedath R. Udayakumar, Francis G. Celii, Scott R. Summerfelt | 2011-11-08 |
| 7799582 | Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean | Kezhakkedath R. Udayakumar, Francis G. Celii, Scott R. Summerfelt | 2010-09-21 |
| 7723199 | Method for cleaning post-etch noble metal residues | Yaw S. Obeng, Kezhakkedath R. Udayakumar, Scott R. Summerfelt, Sanjeev Aggarwal, Francis G. Celii +2 more | 2010-05-25 |
| 7572698 | Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean | Kezhakkedath R. Udayakumar, Francis G. Celii, Scott R. Summerfelt | 2009-08-11 |
| 7517779 | Recessed drain extensions in transistor device | — | 2009-04-14 |
| 7448395 | Process method to facilitate silicidation | Jiong-Ping Lu, Freidoon Mehrad, Vivian Liu, Clint Montgomery, Scott Francis Johnson | 2008-11-11 |
| 7422967 | Method for manufacturing a semiconductor device containing metal silicide regions | Juanita DeLoach, Lance Robertson, Jiong-Ping Lu, Donald Miles | 2008-09-09 |
| 7422968 | Method for manufacturing a semiconductor device having silicided regions | Jiong-Ping Lu, Clint Montgomery, Donald Miles, Duofeng Yue, Thomas D. Bonifiield | 2008-09-09 |
| 7371691 | Silicon recess improvement through improved post implant resist removal and cleans | Trace Hurd, Deborah J. Riley | 2008-05-13 |
| 7341933 | Method for manufacturing a silicided gate electrode using a buffer layer | Shaofeng Yu, Haowen Bu, Jiong-Ping Lu | 2008-03-11 |
| 7252773 | Clean for high density capacitors | — | 2007-08-07 |
| 7253086 | Recessed drain extensions in transistor device | — | 2007-08-07 |
| 7253049 | Method for fabricating dual work function metal gates | Jiong-Ping Lu, Shaofeng Yu, Haowen Bu, Mark Visokay | 2007-08-07 |
| 7244654 | Drive current improvement from recessed SiGe incorporation close to gate | PR Chidambaram, Douglas T. Grider, Brian Smith, Haowen Bu | 2007-07-17 |
| 7228865 | FRAM capacitor stack clean | Scott R. Summerfelt | 2007-06-12 |
| 7220600 | Ferroelectric capacitor stack etch cleaning methods | Scott R. Summerfelt, Kezhakkedath R. Udayakumar, Theodore S. Moise | 2007-05-22 |
| 7217626 | Transistor fabrication methods using dual sidewall spacers | Haowen Bu, PR Chidambaram, Rajesh Khamankar | 2007-05-15 |
| 7157358 | Method for using a wet etch to manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same | Haowen Bu, Shaofeng Yu | 2007-01-02 |
| 7153706 | Ferroelectric capacitor having a substantially planar dielectric layer and a method of manufacture therefor | Sanjeev Aggarwal, Kelly Taylor, Satyavolu Srinivas Papa Rao | 2006-12-26 |
| 7060579 | Increased drive current by isotropic recess etch | PR Chidambaram, Haowen Bu | 2006-06-13 |