Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7422967 | Method for manufacturing a semiconductor device containing metal silicide regions | Juanita DeLoach, Lindsey Hall, Lance Robertson, Jiong-Ping Lu | 2008-09-09 |
| 7422968 | Method for manufacturing a semiconductor device having silicided regions | Jiong-Ping Lu, Clint Montgomery, Lindsey Hall, Duofeng Yue, Thomas D. Bonifiield | 2008-09-09 |
| 7335595 | Silicide formation using a low temperature anneal process | Lance Robertson, Jiong-Ping Lu | 2008-02-26 |
| 7208409 | Integrated circuit metal silicide method | Jiong-Ping Lu, Duofeng Yue, Xiaozhan Liu, Lance Robertson | 2007-04-24 |
| 7029967 | Silicide method for CMOS integrated circuits | Song Zhao, Sue Crank, Amitava Chatterjee, Kaiping Liu, Jiong-Ping Lu +2 more | 2006-04-18 |
| 6833292 | Reducing dopant losses during annealing processes | — | 2004-12-21 |
| 6830980 | Semiconductor device fabrication methods for inhibiting carbon out-diffusion in wafers having carbon-containing regions | Majid Mansoori, Srinivasan Chakravarthi, P R Chidambaram | 2004-12-14 |
| 6831008 | Nickel silicide—silicon nitride adhesion through surface passivation | Jiong-Ping Lu, Glenn J. Tessmer, Melissa Hewson, Ralf B. Willecke, Andrew John McKerrow +2 more | 2004-12-14 |
| 6737354 | Method of CMOS source/drain extension with the PMOS implant spaced by poly oxide and cap oxide from the gates | Douglas T. Grider, Chidi Chidambaram, Amitabh Jain | 2004-05-18 |
| 6709938 | Source/drain extension fabrication process with direct implantation | Douglas T. Grider, P.R. Chidambaram, Amitabh Jain | 2004-03-23 |