Issued Patents All Time
Showing 151–175 of 253 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9318377 | Etch damage and ESL free dual damascene metal interconnect | Sunil Kumar Singh, Chung-Ju Lee | 2016-04-19 |
| 9312220 | Structure and method for a low-K dielectric with pillar-type air-gaps | Chih Wei Lu, Chung-Ju Lee | 2016-04-12 |
| 9293413 | Semiconductor devices and methods of manufacture thereof | Hsin-Chieh Yao, Chung-Ju Lee, Shau-Lin Shue | 2016-03-22 |
| 9291913 | Pattern generator for a lithography system | Chen-Hua Yu, Chih Wei Lu, Jaw-Jung Shin, Shy-Jay Lin, Burn Jeng Lin | 2016-03-22 |
| 9281263 | Interconnect structure including a continuous conductive body | Ming-Han Lee, Hai-Ching Chen, Hsiang-Huan Lee, Chi-Lin Teng | 2016-03-08 |
| 9275953 | Semiconductor integrated circuit and fabricating the same | Hsin-Yen Huang, Yu-Sheng Chang, Hai-Ching Chen | 2016-03-01 |
| 9236277 | Integrated circuit with a thermally conductive underfill and methods of forming same | Chen-Hua Yu | 2016-01-12 |
| 9230911 | Interconnect structure and method of forming the same | Cheng-Hsiung Tsai, Chung-Ju Lee, Hai-Ching Chen, Shau-Lin Shue | 2016-01-05 |
| 9230809 | Self-aligned double patterning | Yu-Sheng Chang, Chung-Ju Lee | 2016-01-05 |
| 9224643 | Structure and method for tunable interconnect scheme | Chung-Ju Lee, Ming-Shih Yeh, Hai-Ching Chen, Shau-Lin Shue | 2015-12-29 |
| 9209076 | Method of double patterning lithography process using plurality of mandrels for integrated circuit applications | Hsin-Chieh Yao, Chung-Ju Lee, Yung-Hsu Wu, Shau-Lin Shue | 2015-12-08 |
| 9177797 | Lithography using high selectivity spacers for pitch reduction | Yu-Sheng Chang, Chung-Ju Lee, Cheng-Hsiung Tsai, Yung-Hsu Wu, Hsiang-Huan Lee +5 more | 2015-11-03 |
| 9165822 | Semiconductor devices and methods of forming same | Hsin-Yen Huang, Chi-Lin Teng, Hai-Ching Chen | 2015-10-20 |
| 9153478 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Shih-Ming Chang, Ken-Hsien Hsieh, Ming-Feng Shieh, Chih-Ming Lai +6 more | 2015-10-06 |
| 9134633 | System and method for dark field inspection | Bo-Jiun Lin, Hsin-Chieh Yao, Hai-Ching Chen | 2015-09-15 |
| 9136106 | Method for integrated circuit patterning | Chieh-Han Wu, Chung-Ju Lee, Cheng-Hsiung Tsai, Ming-Feng Shieh, Ru-Gun Liu +1 more | 2015-09-15 |
| 9129906 | Self-aligned double spacer patterning process | Yung-Hsu Wu, Tsung-Min Huang, Cheng-Hsiung Tsai, Chung-Ju Lee, Shau-Lin Shue | 2015-09-08 |
| 9129968 | Schemes for forming barrier layers for copper in interconnect structures | Chen-Hua Yu, Hai-Ching Chen | 2015-09-08 |
| 9123776 | Self-aligned double spacer patterning process | Cheng-Hsiung Tsai, Yung-Hsu Wu, Tsung-Min Huang, Chung-Ju Lee, Shau-Lin Shue | 2015-09-01 |
| 9087877 | Low-k interconnect structures with reduced RC delay | Chung-Chi Ko, Ting-Yu Shen, Keng-Chu Lin, Chia-Cheng Chou, Shwang-Ming Jeng +1 more | 2015-07-21 |
| 9040417 | Semiconductor devices and methods of manufacture thereof | Hsin-Chieh Yao, Chung-Ju Lee, Shau-Lin Shue | 2015-05-26 |
| 9041015 | Package structure and methods of forming same | Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen | 2015-05-26 |
| 9036956 | Method of fabricating a polymer waveguide | Chun-Hao Tseng, Wan-Yu Lee, Hai-Ching Chen | 2015-05-19 |
| 9029171 | Self repairing process for porous dielectric materials | Tsung-Min Huang, Chung-Ju Lee | 2015-05-12 |
| 9001308 | Pattern generator for a lithography system | Chen-Hua Yu, Chih Wei Lu, Jaw-Jung Shin, Shy-Jay Lin, Burn Jeng Lin | 2015-04-07 |