Issued Patents All Time
Showing 276–300 of 549 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10032662 | Packaged semiconductor devices and packaging methods thereof | Shu-Hang Liao, Ying-Ching Shih, Szu-Wei Lu | 2018-07-24 |
| 10020344 | CIS chips and methods for forming the same | Chen-Hua Yu, Wen-Chih Chiou | 2018-07-10 |
| 10020275 | Semiconductive packaging device and manufacturing method thereof | Feng-Cheng Hsu | 2018-07-10 |
| 10008463 | Wafer-level packaging mechanisms | Jui-Pin Hung | 2018-06-26 |
| 10008485 | Semiconductor device and method of manufacture | Po-Hao Tsai, Li-Hui Cheng, Porter Chen | 2018-06-26 |
| 9991244 | Method for forming hybrid bonding with through substrate via (TSV) | — | 2018-06-05 |
| 9978657 | Semiconductor package device and manufacturing method thereof | Nai-Wei Liu, Jui-Pin Hung | 2018-05-22 |
| 9978628 | Bonding method including adjusting surface contours of a bonding system | Yu-Liang Lin, Weng-Jin Wu | 2018-05-22 |
| 9960088 | End point detection in grinding | Yi-Chao Mao, Jui-Pin Hung, Shin-Puu Jeng, Chen-Hua Yu | 2018-05-01 |
| 9960125 | Method of forming a semiconductor package | Chin-Chuan Chang, Jui-Pin Hung | 2018-05-01 |
| 9950450 | Molding chamber apparatus and curing method | Chen-Hua Yu, Shin-Puu Jeng, Jui-Pin Hung, Hsien-Wen Liu | 2018-04-24 |
| 9953955 | Integrated fan-out package structures with recesses in molding compound | Po-Hao Tsai, Li-Hui Cheng, Jui-Pin Hung | 2018-04-24 |
| 9953949 | Through package via (TPV) | Po-Hao Tsai | 2018-04-24 |
| 9953948 | Pillar design for conductive bump | Cheng-Chieh Hsieh, Cheng-Lin Huang, Po-Hao Tsai, Shang-Yun Hou, Shin-Puu Jeng | 2018-04-24 |
| 9953907 | PoP device | Chin-Chuan Chang, Nai-Wei Liu, Wan-Ting Shih | 2018-04-24 |
| 9947629 | Method of forming contact holes in a fan out package | Feng-Cheng Hsu, Szu-Wei Lu | 2018-04-17 |
| 9941244 | Protective layer for contact pads in fan-out interconnect structure and method of forming same | Chin-Chuan Chang, Tsei-Chung Fu | 2018-04-10 |
| 9929050 | Mechanisms for forming three-dimensional integrated circuit (3DIC) stacking structure | — | 2018-03-27 |
| 9929108 | Backside redistribution layer (RDL) structure | Po-Hao Tsai | 2018-03-27 |
| 9929109 | Stacking of multiple dies for forming three dimensional integrated circuit (3DIC) structure | Chih-Wei Wu, Ying-Ching Shih, Szu-Wei Lu | 2018-03-27 |
| 9929128 | Chip package structure with adhesive layer | Li-Hui Cheng, Po-Hao Tsai, Yi-Hang Lin | 2018-03-27 |
| 9922903 | Interconnect structure for package-on-package devices and a method of fabricating | Jui-Pin Hung, Po-Hao Tsai, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2018-03-20 |
| 9895871 | De-bonding and cleaning process and system | Ying-Ching Shih, Szu-Wei Lu | 2018-02-20 |
| 9859112 | Bonded semiconductor structures | — | 2018-01-02 |
| 9859181 | Underfill dispensing in 3D IC using metrology | Szu-Wei Lu, I-Hsuan Peng | 2018-01-02 |