Issued Patents All Time
Showing 51–75 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9691726 | Methods for forming fan-out package structure | Ming-Da Cheng, Hsien-Wei Chen, Meng-Tse Chen, Chung-Shi Liu | 2017-06-27 |
| 9653423 | Integrated circuit structure having dies with connectors | Jing-Cheng Lin | 2017-05-16 |
| 9595510 | Structure and formation method for chip package | Jui-Pin Hung, Hsien-Wen Liu, Shin-Puu Jeng | 2017-03-14 |
| 9511299 | Rotary dynamic simulation device and audiovisual apparatus using the same | Deng-Horng Lai, Ke-Cheng Chien | 2016-12-06 |
| 9508666 | Packaging structures and methods with a metal pillar | Chen-Hua Yu, Shin-Puu Jeng, Shang-Yun Hou, Kuo-Ching Hsu, Cheng-Chieh Hsieh +3 more | 2016-11-29 |
| 9496235 | Pillar design for conductive bump | Cheng-Chieh Hsieh, Po-Hao Tsai, Shang-Yun Hou, Jing-Cheng Lin, Shin-Puu Jeng | 2016-11-15 |
| 9418876 | Method of three dimensional integrated circuit assembly | Jing-Cheng Lin, Weng-Jin Wu, Shih-Ting Lin, Szu-Wei Lu, Shin-Puu Jeng +1 more | 2016-08-16 |
| 9379080 | Method and apparatus for a conductive pillar structure | Jung-Hua Chang, Nai-Wei Liu, Jui-Pin Hung, Jing-Cheng Lin | 2016-06-28 |
| 9349701 | Self-aligning conductive bump structure and method of fabrication | I-Ting Chen, Ying-Ching Shih, Po-Hao Tsai, Szu-Wei Lu, Jing-Cheng Lin +2 more | 2016-05-24 |
| 9343419 | Bump structures for semiconductor package | Chen-Hua Yu, Meng-Liang Lin, Jy-Jie Gau, Jing-Cheng Lin, Kuo-Ching Hsu | 2016-05-17 |
| 9312149 | Method for forming chip-on-wafer assembly | Jing-Cheng Lin, Szu-Wei Lu, Jui-Pin Hung, Shin-Puu Jeng, Chen-Hua Yu | 2016-04-12 |
| 9299680 | Integrated circuit structure having dies with connectors | Jing-Cheng Lin | 2016-03-29 |
| 9230934 | Surface treatment in electroless process for adhesion enhancement | Jing-Cheng Lin, Wei-An Tsao | 2016-01-05 |
| 9159687 | Solder bump for ball grid array | Jung-Hua Chang, Jing-Cheng Lin | 2015-10-13 |
| 9159589 | Bump structural designs to minimize package defects | Jing-Cheng Lin | 2015-10-13 |
| 9093314 | Copper bump structures having sidewall protection layers | Jing-Cheng Lin, Ya-Hsi Hwung, Hsin-Yu Chen, Po-Hao Tsai, Yan-Fu Lin +2 more | 2015-07-28 |
| 9041225 | Integrated circuit structure having dies with connectors | Jing-Cheng Lin | 2015-05-26 |
| 9024438 | Self-aligning conductive bump structure and method of making the same | I-Ting Chen, Ying-Ching Shih, Po-Hao Tsai, Szu-Wei Lu, Jing-Cheng Lin +2 more | 2015-05-05 |
| 8999839 | Semiconductor structure having an air-gap region and a method of manufacturing the same | Shu-Hui Su, Jiing-Feng Yang, Zhen-Cheng Wu, Ren-Guei Wu, Dian-Hau Chen +1 more | 2015-04-07 |
| 8994171 | Method and apparatus for a conductive pillar structure | Jung-Hua Chang, Nai-Wei Liu, Jui-Pin Hung, Jing-Cheng Lin | 2015-03-31 |
| 8975749 | Method of making a semiconductor device including barrier layers for copper interconnect | Nai-Wei Liu, Zhen-Cheng Wu, Po-Hsiang Huang, Yung-Chih Wang, Shu-Hui Su +2 more | 2015-03-10 |
| 8953336 | Surface metal wiring structure for an IC substrate | Chin-Fu Kao, Wen-Chih Chiou, Jing-Cheng Lin, Po-Hao Tsai | 2015-02-10 |
| 8922004 | Copper bump structures having sidewall protection layers | Jing-Cheng Lin, Ya-Hsi Hwung, Hsin-Yu Chen, Po-Hao Tsai, Yan-Fu Lin +2 more | 2014-12-30 |
| 8901735 | Connector design for packaging integrated circuits | Chen-Hua Yu, Ying-Ching Shih, Po-Hao Tsai, Chin-Fu Kao, Cheng-Chieh Hsieh +4 more | 2014-12-02 |
| 8846524 | Plating process | Chin-Fu Kao, Jing-Cheng Lin | 2014-09-30 |