Issued Patents All Time
Showing 76–100 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9349595 | Methods of manufacturing semiconductor devices | Chung-Ju Lee, Hsin-Chieh Yao, Tien-I Bao | 2016-05-24 |
| 9299603 | Air gap formation by damascene process | Chung-Ju Lee | 2016-03-29 |
| 9275960 | Integrated circuit formed using spacer-like copper deposition | Hsin-Chieh Yao, Chung-Ju Lee, Hsiang-Huan Lee | 2016-03-01 |
| 9269562 | In situ chamber clean with inert hydrogen helium mixture during wafer process | Robert Dinsmore, John C. Forster, Song-Moon Suh, Glen T. Mori | 2016-02-23 |
| 9252002 | Two piece shutter disk assembly for a substrate process chamber | Ananthkrishna Jupudi, Robert Dinsmore, Song-Moon Suh | 2016-02-02 |
| 9230911 | Interconnect structure and method of forming the same | Chung-Ju Lee, Hai-Ching Chen, Tien-I Bao, Shau-Lin Shue | 2016-01-05 |
| 9177797 | Lithography using high selectivity spacers for pitch reduction | Yu-Sheng Chang, Chung-Ju Lee, Yung-Hsu Wu, Hsiang-Huan Lee, Hai-Ching Chen +5 more | 2015-11-03 |
| 9153478 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Shih-Ming Chang, Ken-Hsien Hsieh, Ming-Feng Shieh, Chih-Ming Lai +6 more | 2015-10-06 |
| 9147558 | Finned shutter disk for a substrate process chamber | Bonnie T. Chia, Song-Moon Suh, Robert Dinsmore, Glen T. Mori | 2015-09-29 |
| 9136106 | Method for integrated circuit patterning | Chieh-Han Wu, Chung-Ju Lee, Ming-Feng Shieh, Ru-Gun Liu, Tien-I Bao +1 more | 2015-09-15 |
| 9129967 | Integrated circuit device having a copper interconnect | Chung-Ju Lee, Tsung-Min Huang | 2015-09-08 |
| 9129906 | Self-aligned double spacer patterning process | Yung-Hsu Wu, Tsung-Min Huang, Chung-Ju Lee, Tien-I Bao, Shau-Lin Shue | 2015-09-08 |
| 9123776 | Self-aligned double spacer patterning process | Yung-Hsu Wu, Tsung-Min Huang, Chung-Ju Lee, Tien-I Bao, Shau-Lin Shue | 2015-09-01 |
| 9099400 | Semiconductor device manufacturing methods | Tsung-Min Huang, Chung-Ju Lee | 2015-08-04 |
| 9034756 | Integrated circuit interconnects and methods of making same | Chung-Ju Lee, Tsung-Jung Tsai, Hsiang-Huan Lee, Ming-Han Lee | 2015-05-19 |
| 8971009 | Electrostatic chuck with temperature control | Vijay D. Parkhe, Steven V. Sansoni | 2015-03-03 |
| 8952502 | Semiconductor patterning | Chung-Ju Lee, Yu-Sheng Chang, Tsung-Jung Tsai | 2015-02-10 |
| 8900471 | In situ plasma clean for removal of residue from pedestal surface without breaking vacuum | Richard Green, Shambhu N. Roy, Puneet Bajaj, David H. Loo | 2014-12-02 |
| 8900989 | Method of fabricating an air gap using a damascene process and structure of same | Chung-Ju Lee | 2014-12-02 |
| 8901007 | Addition of carboxyl groups plasma during etching for interconnect reliability enhancement | Chung-Ju Lee, Sunil Kumar Singh, Tien-I Bao | 2014-12-02 |
| 8890321 | Method of semiconducotr integrated circuit fabrication | Hsin-Chieh Yao, Chung-Ju Lee, Tien-I Bao | 2014-11-18 |
| 8866297 | Air-gap formation in interconnect structures | Chung-Ju Lee, Tien-I Bao | 2014-10-21 |
| 8664743 | Air-gap formation in interconnect structures | Chung-Ju Lee, Tien-I Bao | 2014-03-04 |
| 8518836 | Semiconductor patterning | Chung-Ju Lee, Yu-Sheng Chang, Tsung-Jung Tsai | 2013-08-27 |
| 8390980 | Electrostatic chuck assembly | Steven V. Sansoni, Shambhu N. Roy, Karl M. Brown, Vijay D. Parkhe, Hari Ponnekanti | 2013-03-05 |