Issued Patents All Time
Showing 176–200 of 214 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7354524 | Method and system for processing multi-layer films | Hui Yang, Miao-Ju Hsu, Hun-Jan Tao | 2008-04-08 |
| 7186662 | Method for forming a hard mask for gate electrode patterning and corresponding device | Chien-Hao Chen, Chia-Jen Chen, Tze-Liang Lee, Shih-Chang Chen | 2007-03-06 |
| 7169701 | Dual damascene trench formation to avoid low-K dielectric damage | Chen-Nan Yeh, Tsiao-Chen Wu | 2007-01-30 |
| 7067433 | Method to reduce the fluorine contamination on the Al/Al-Cu pad by a post high cathod temperature plasma treatment | Wen-Jui Fu, Shang-Ru Shen, Yun-Hung Shen | 2006-06-27 |
| 7033518 | Method and system for processing multi-layer films | Hui Yang, Miao-Ju Hsu, Hun-Jan Tao | 2006-04-25 |
| 7022610 | Wet cleaning method to eliminate copper corrosion | Chun-Li Chou, Yih-Ann Lin, Yi-Chen Huang, Hun-Jan Tao | 2006-04-04 |
| 6995085 | Underlayer protection for the dual damascene etching | Lawrence Lui, Chia-Shia Tsai, Jen-Cheng Liu | 2006-02-07 |
| 6960496 | Method of damascene process flow | Kang-Cheng Lin | 2005-11-01 |
| 6914007 | In-situ discharge to avoid arcing during plasma etch processes | Ching-Hui Ma, Tsang-Jiuh Wu, Hui Yu, Hun-Jan Tao | 2005-07-05 |
| 6821880 | Process of dual or single damascene utilizing separate etching and DCM apparati | Hun-Jan Tao | 2004-11-23 |
| 6809028 | Chemistry for liner removal in a dual damascene process | Chien-Chung Fu | 2004-10-26 |
| 6790770 | Method for preventing photoresist poisoning | Jen-Cheng Liu, Jyu-Horng Shieh | 2004-09-14 |
| 6616855 | Process to reduce surface roughness of low K damascene | Chen-Nan Yeh | 2003-09-09 |
| 6444517 | High Q inductor with Cu damascene via/trench etching simultaneous module | Heng-Ming Hsu, Shyh-Chyi Wong, Chaochieh Tsai, Ssu-Pin Ma, Liang-Kun Huang | 2002-09-03 |
| 6440863 | Plasma etch method for forming patterned oxygen containing plasma etchable layer | Chia-Shiun Tsai, Hun-Jan Tao | 2002-08-27 |
| 6429119 | Dual damascene process to reduce etch barrier thickness | Li-Chih Chao, Chia-Shiung Tsai, Ming-Huei Lui, Jen-Cheng Liu | 2002-08-06 |
| 6383943 | Process for improving copper fill integrity | Jen-Cheng Liu, Jyu-Horng Shieh, Chia-Shiung Tsai, Bor-Shyang Lin | 2002-05-07 |
| 6323121 | Fully dry post-via-etch cleaning method for a damascene process | Jen-Cheng Liu, Li-Chih Chao, Chia-Shiung Tsai, Ming-Huei Lui | 2001-11-27 |
| 6319822 | Process for forming an integrated contact or via | Chia-Shiung Tsai, Shau-Lin Shue, Hun-Jan Tao | 2001-11-20 |
| 6309962 | Film stack and etching sequence for dual damascene | Li-Chi Chao, Jen-Cheng Liu, Min-Huei Lui, Chia-Shiung Tsai | 2001-10-30 |
| 6297168 | Edge defect inhibited trench etch plasma etch method | Jyu-Horng Shieh, Jen-Cheng Liu, Li-Chi Chao, Chia-Shia Tsai | 2001-10-02 |
| 6277752 | Multiple etch method for forming residue free patterned hard mask layer | — | 2001-08-21 |
| 6211061 | Dual damascene process for carbon-based low-K materials | Ming-Huei Lui, Jen-Cheng Liu, Li-Chih Chao, Chia-Shiung Tsai | 2001-04-03 |
| 6194128 | Method of dual damascene etching | Hun-Jan Tao, Chia-Shiung Tsai | 2001-02-27 |
| 6194284 | Method for forming residue free etched silicon layer | — | 2001-02-27 |