Issued Patents All Time
Showing 151–175 of 214 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9041125 | Fin shape for fin field-effect transistors and method of forming | Jr-Jung Lin, Chih-Han Lin, Ming-Ching Chang | 2015-05-26 |
| 9034706 | FinFETs with regrown source/drain and methods for forming the same | Eric Chih-Fang Liu, Tzu-Wei Kao, Ryan Chia-Jen Chen | 2015-05-19 |
| 8946014 | FinFET device structure and methods of making same | Yu-Chao Lin, Yih-Ann Lin, Ryan Chia-Jen Chen | 2015-02-03 |
| 8932962 | Chemical dispensing system and method | Weibo Yu, Kuo-Bin Huang, Syun-Ming Jang | 2015-01-13 |
| 8932936 | Method of forming a FinFET device | Chia-Chu Liu, Kuei-Shun Chen, Chih-Hsiung Peng, Chi-Kang Chang, Chiang Mu-Chi +3 more | 2015-01-13 |
| 8900937 | FinFET device structure and methods of making same | Yu-Chao Lin, Cheng-Han Wu, Eric Chih-Fang Liu, Ryan Chia-Jen Chen | 2014-12-02 |
| 8889502 | Finlike structures and methods of making same | Ming-Hsi Yeh, Syun-Ming Jang | 2014-11-18 |
| 8772183 | Method of forming an integrated circuit | Tzu-Yen Hsieh, Chang Ming-Ching, Chun-Hung Lee, Yih-Ann Lin, De-Fang Chen | 2014-07-08 |
| 8765556 | Method of fabricating strained structure in semiconductor device | Yu-Rung Hsu, Chen-Hua Yu, Ming-Huan Tsai, Hsien-Hsin Lin, Hsueh-Chang Sung | 2014-07-01 |
| 8748989 | Fin field effect transistors | Yu-Chao Lin, Chih-Tang Peng, Shun-Hui Yang, Ryan Chia-Jen Chen | 2014-06-10 |
| 8735252 | Method of semiconductor integrated circuit fabrication | Weibo Yu, Ming-Hsi Yeh, Chih-Tang Peng, Hao-Ming Lien, Syun-Ming Jang | 2014-05-27 |
| 8736016 | Strained isolation regions | Mong-Song Liang, Tze-Liang Lee, Kuo-Tai Huang, Hao-Ming Lien, Chih-Tang Peng | 2014-05-27 |
| 8691655 | Method of semiconductor integrated circuit fabrication | Tzu-Yen Hsieh, Ming-Ching Chang, Yuan-Sheng Huang, Ming-Chia Tai | 2014-04-08 |
| 8529783 | Method for backside polymer reduction in dry-etch process | Huang-Ming Chen, Chun-Li Chou, Hun-Jan Tao | 2013-09-10 |
| 8507979 | Semiconductor integrated circuit with metal gate | Yuan-Sheng Huang, Ming-Ching Chang | 2013-08-13 |
| 8409964 | Shallow trench isolation with improved structure and method of forming | Jhon Jhy Liaw, Chia-Wei Chang | 2013-04-02 |
| 8273632 | Patterning methodology for uniformity control | Yu-Chao Lin, Ming-Ching Chang, Yih-Ann Lin, Ryan Chia-Jen Chen | 2012-09-25 |
| 8258588 | Sealing layer of a field effect transistor | Yu-Chao Lin, Jr-Jung Lin, Yih-Ann Lin, Jih-Jse Lin, Ryan Chia-Jen Chen +1 more | 2012-09-04 |
| 8120094 | Shallow trench isolation with improved structure and method of forming | Jhon Jhy Liaw, Chia-Wei Chang | 2012-02-21 |
| 8053323 | Patterning methodology for uniformity control | Yu-Chao Lin, Ming-Ching Chang, Yih-Ann Lin, Ryan Chia-Jen Chen | 2011-11-08 |
| 7833853 | Method of defining gate structure height for semiconductor devices | Ryan Chia-Jen Chen, Yih-Ann Lin, Joseph Lin, Jr-Jung Lin, Yu-Chao Lin +1 more | 2010-11-16 |
| 7759239 | Method of reducing a critical dimension of a semiconductor device | Yu-Chao Lin, De-Fang Chen, Chia-Wei Chang, Yih-Ann Lin, Ryan Chia-Jen Chen +1 more | 2010-07-20 |
| 7713380 | Method and apparatus for backside polymer reduction in dry-etch process | Huang-Ming Chen, Chun-Li Chou, Hun-Jan Tao | 2010-05-11 |
| 7538025 | Dual damascene process flow for porous low-k materials | Chen-Nan Yeh, Chien-Chung Fu | 2009-05-26 |
| 7511349 | Contact or via hole structure with enlarged bottom critical dimension | Ming-Huan Tsai, Fang Chen, Syun-Ming Jang | 2009-03-31 |