Issued Patents All Time
Showing 201–214 of 214 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6133145 | Method to increase the etch rate selectivity between metal and photoresist via use of a plasma treatment | — | 2000-10-17 |
| 6130167 | Method of preventing corrosion of a metal structure exposed in a non-fully landed via | Hun-Jan Tao, Shu Yang | 2000-10-10 |
| 6107206 | Method for etching shallow trenches in a semiconductor body | Li-Chih Chao | 2000-08-22 |
| 6043163 | HCL in overetch with hard mask to improve metal line etching profile | Chia-Shiung Tsai, Hun-Jan Tao | 2000-03-28 |
| 6040248 | Chemistry for etching organic low-k materials | Ming-Hsin Huang, Hun-Jan Tao, Chia-Shiung Tsai | 2000-03-21 |
| 6027861 | VLSIC patterning process | Chen-Hua Yu, Syun-Ming Jang | 2000-02-22 |
| 6025273 | Method for etching reliable small contact holes with improved profiles for semiconductor integrated circuits using a carbon doped hard mask | Chia-Shiung Tsai, Hun-Jan Tao | 2000-02-15 |
| 6008131 | Bottom rounding in shallow trench etching using a highly isotropic etching step | — | 1999-12-28 |
| 5994229 | Achievement of top rounding in shallow trench etch | Chia-Shiung Tsai | 1999-11-30 |
| 5989784 | Etch recipe for embedded DRAM passivation with etch stopping layer scheme | Yu-Hua Lee, Cheng-Ming Wu | 1999-11-23 |
| 5981398 | Hard mask method for forming chlorine containing plasma etched layer | Chia-Shiung Tsai, Hun-Jan Tao | 1999-11-09 |
| 5970376 | Post via etch plasma treatment method for forming with attenuated lateral etching a residue free via through a silsesquioxane spin-on-glass (SOG) dielectric layer | — | 1999-10-19 |
| 5942446 | Fluorocarbon polymer layer deposition predominant pre-etch plasma etch method for forming patterned silicon containing dielectric layer | Chen-Hua Yu | 1999-08-24 |
| 5807789 | Method for forming a shallow trench with tapered profile and round corners for the application of shallow trench isolation (STI) | C. S. Tsai, C. H. Yu | 1998-09-15 |