{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Stats Chippac", "item": "https://www.patentleaderboard.com/company/stats-chippac"}, {"@type": "ListItem", "position": 3, "name": "HeeJo Chi", "item": "https://www.patentleaderboard.com/inventor/fl:he_ln:chi-4"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
HC

HeeJo Chi — 85 Patents

SCStats Chippac: 83 patents #14 of 425Top 4%
JCJcet Semiconductor (Shaoxing) Co.: 1 patents #18 of 38Top 50%
Seojong-myeon, KR: #21 of 10,205 inventorsTop 1%
Overall (All Time): #20,018 of 4,157,543Top 1%
85 Patents All Time
HeeJo Chi has been granted 85 US patents while listed as an inventor at Stats Chippac. The first was granted in 2011 and the most recent in June 2023. HeeJo Chi ranks #20,018 of 4,157,543 US inventors in our database (top 0.48%). Patent records list HeeJo Chi in Seojong-myeon, KR.

Patents per Year

Patents granted per year, 2011 to 2023Bar chart with a peak of 21 patents in 2016.peak 212011: 6 patents20112012: 9 patents2013: 18 patents20132014: 7 patents2015: 7 patents20152016: 21 patents2017: 8 patents20172018: 5 patents2019: 1 patents20192020: 1 patents2021: 1 patents20212023: 1 patents2023

Issued Patents All Time

Showing 1–25 of 85 patents

Patent #TitleCo-InventorsDate
11688612 Semiconductor device and method of forming interposer with opening to contain semiconductor die Reza A. Pagaila, Yaojian Lin, Jun Mo Koo 2023-06-27
10903183 Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die NamJu Cho, HanGil Shin 2021-01-26
10573600 Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP NamJu Cho, Junwoo Myung 2020-02-25
10510703 Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package HanGil Shin, NamJu Cho 2019-12-17
9966335 Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die NamJu Cho, HanGil Shin 2018-05-08
9875911 Semiconductor device and method of forming interposer with opening to contain semiconductor die Reza A. Pagaila, Yaojian Lin, Jun Mo Koo 2018-01-23
9865575 Methods of forming conductive and insulating layers HanGil Shin, KyungMoon Kim 2018-01-09
9865554 Integrated circuit packaging system with under bump metallization and method of manufacture thereof Il Kwon Shim, Kyung-Moon Kim, JunMo Koo, Bartholomew Liao Chung Foh, Zigmund Ramirez Camacho 2018-01-09
9859200 Integrated circuit packaging system with interposer support structure mechanism and method of manufacture thereof SooSan Park, Kyusang Kim, YeoChan Ko, KeoChang Lee, HeeSoo Lee 2018-01-02
9842808 Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor die HanGil Shin, NamJu Cho 2017-12-12
9748157 Integrated circuit packaging system with joint assembly and method of manufacture thereof HanGil Shin, NamJu Cho, Kyung-Moon Kim 2017-08-29
9735113 Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP NamJu Cho, Junwoo Myung 2017-08-15
9721921 Semiconductor device and method of bonding semiconductor die to substrate in reconstituted wafer form KyungMoon Kim, KooHong Lee, JaeHak Yee, YoungChul Kim, Lan H. Hoang +3 more 2017-08-01
9691707 Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package HanGil Shin, NamJu Cho 2017-06-27
9679769 Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereof Zigmund Ramirez Camacho, Bartholomew Liao Chung Foh, Sheila Marie L. Alvarez, Dao Nguyen Phu Cuong 2017-06-13
9673171 Integrated circuit packaging system with coreless substrate and method of manufacture thereof HeeSoo Lee, OMin Kwon 2017-06-06
9558965 Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint NamJu Cho, HanGil Shin 2017-01-31
9508635 Methods of forming conductive jumper traces HanGil Shin, NamJu Cho 2016-11-29
9502267 Integrated circuit packaging system with support structure and method of manufacture thereof Bartholomew Liao Chung Foh, Sheila Marie L. Alvarez, Zigmund Ramirez Camacho, Dao Nguyen Phu Cuong 2016-11-22
9496152 Carrier system with multi-tier conductive posts and method of manufacture thereof NamJu Cho, HanGil Shin 2016-11-15
9406531 Integrated circuit packaging system with photoimagable dielectric-defined trace and method of manufacture thereof Zigmund Ramirez Camacho, Bartholomew Liao Chung Foh, Sheila Marie L. Alvarez, Dao Nguyen Phu Cuong 2016-08-02
9406642 Integrated circuit packaging system with insulated trace and method of manufacture thereof Bartholomew Liao Chung Foh, Sheila Marie L. Alvarez, Zigmund Ramirez Camacho, Dao Nguyen Phu Cuong 2016-08-02
9406533 Methods of forming conductive and insulating layers HanGil Shin, KyungMoon Kim 2016-08-02
9397050 Semiconductor device and method of forming pre-molded semiconductor die having bumps embedded in encapsulant HanGil Shin, NamJu Cho 2016-07-19
9391046 Semiconductor device and method of forming 3D semiconductor package with semiconductor die stacked over semiconductor wafer Yeonglm Park, HyungMin Lee 2016-07-12